{"id":"https://openalex.org/W2143729122","doi":"https://doi.org/10.1109/isqed.2008.4479740","title":"Architecting for Physical Verification Performance and Scaling","display_name":"Architecting for Physical Verification Performance and Scaling","publication_year":2008,"publication_date":"2008-03-01","ids":{"openalex":"https://openalex.org/W2143729122","doi":"https://doi.org/10.1109/isqed.2008.4479740","mag":"2143729122"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2008.4479740","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2008.4479740","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Symposium on Quality Electronic Design (isqed 2008)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053501895","display_name":"John Ferguson","orcid":"https://orcid.org/0000-0001-6609-2073"},"institutions":[{"id":"https://openalex.org/I105695857","display_name":"Siemens (Hungary)","ror":"https://ror.org/01rk7mv85","country_code":"HU","type":"company","lineage":["https://openalex.org/I105695857","https://openalex.org/I1325886976"]},{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["HU","US"],"is_corresponding":false,"raw_author_name":"John Ferguson","raw_affiliation_strings":["Mentor Graphics Corporation, USA","Mentor Graphics Corp., Beaverton"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, USA","institution_ids":["https://openalex.org/I4210156212"]},{"raw_affiliation_string":"Mentor Graphics Corp., Beaverton","institution_ids":["https://openalex.org/I105695857"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5081894980","display_name":"Robert W. Todd","orcid":null},"institutions":[{"id":"https://openalex.org/I105695857","display_name":"Siemens (Hungary)","ror":"https://ror.org/01rk7mv85","country_code":"HU","type":"company","lineage":["https://openalex.org/I105695857","https://openalex.org/I1325886976"]},{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["HU","US"],"is_corresponding":false,"raw_author_name":"Robert Todd","raw_affiliation_strings":["Mentor Graphics Corporation, USA","Mentor Graphics Corp., Beaverton"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, USA","institution_ids":["https://openalex.org/I4210156212"]},{"raw_affiliation_string":"Mentor Graphics Corp., Beaverton","institution_ids":["https://openalex.org/I105695857"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.15894428,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"283","last_page":"288"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9918000102043152,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10260","display_name":"Software Engineering Research","score":0.9797000288963318,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7697739601135254},{"id":"https://openalex.org/keywords/turnaround-time","display_name":"Turnaround time","score":0.7098365426063538},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.5544546842575073},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.4968321621417999},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4861147403717041},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.4728030562400818},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4350699186325073},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35089215636253357},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.3357284665107727},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3333769142627716},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3225541412830353},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13064917922019958},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09949719905853271},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.07636779546737671},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.07278069853782654}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7697739601135254},{"id":"https://openalex.org/C176553487","wikidata":"https://www.wikidata.org/wiki/Q7855819","display_name":"Turnaround time","level":2,"score":0.7098365426063538},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.5544546842575073},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.4968321621417999},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4861147403717041},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.4728030562400818},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4350699186325073},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35089215636253357},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.3357284665107727},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3333769142627716},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3225541412830353},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13064917922019958},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09949719905853271},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.07636779546737671},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.07278069853782654},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2008.4479740","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2008.4479740","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Symposium on Quality Electronic Design (isqed 2008)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4699999988079071,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W81736353","https://openalex.org/W2150871235"],"related_works":["https://openalex.org/W2105593427","https://openalex.org/W3120172095","https://openalex.org/W2118572231","https://openalex.org/W2106507440","https://openalex.org/W3209085687","https://openalex.org/W2108860137","https://openalex.org/W2125238773","https://openalex.org/W2153955347","https://openalex.org/W2533078207","https://openalex.org/W1928822090"],"abstract_inverted_index":{"The":[0],"primary":[1],"goal":[2],"when":[3],"using":[4],"physical":[5,52],"verification":[6,24,53],"tools":[7,25],"is":[8],"to":[9,31,33,55,63],"achieve":[10],"the":[11,15,57,65],"best":[12],"performance":[13],"at":[14],"lowest":[16],"cost,":[17],"both":[18],"in":[19,68],"resources":[20],"and":[21,35,44,49],"time.":[22],"Physical":[23],"rely":[26],"on":[27],"multiple":[28],"enabling":[29],"technologies":[30],"contribute":[32],"runtime":[34],"turnaround":[36],"time":[37],"reduction.":[38],"Using":[39],"differing":[40],"combinations":[41],"of":[42,59],"architecture":[43],"scaling,":[45],"this":[46],"paper":[47],"compares":[48],"contrasts":[50],"three":[51],"approaches":[54],"determine":[56],"combination":[58],"factors":[60],"most":[61],"likely":[62],"produce":[64],"desired":[66],"results":[67],"a":[69],"production":[70],"environment.":[71]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
