{"id":"https://openalex.org/W2097506792","doi":"https://doi.org/10.1109/isqed.2004.1283724","title":"FinFET SRAM - device and circuit design considerations","display_name":"FinFET SRAM - device and circuit design considerations","publication_year":2004,"publication_date":"2004-05-06","ids":{"openalex":"https://openalex.org/W2097506792","doi":"https://doi.org/10.1109/isqed.2004.1283724","mag":"2097506792"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2004.1283724","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2004.1283724","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032113702","display_name":"H. Ananthan","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"H. Ananthan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015267141","display_name":"Aditya Bansal","orcid":"https://orcid.org/0000-0002-2952-2385"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Bansal","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031161187","display_name":"Kaushik Roy","orcid":"https://orcid.org/0000-0002-0735-9695"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Roy","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":null,"apc_paid":null,"fwci":5.7949,"has_fulltext":false,"cited_by_count":44,"citation_normalized_percentile":{"value":0.96879557,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"511","last_page":"516"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/planar","display_name":"Planar","score":0.7271945476531982},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.6431596875190735},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.628429651260376},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6157509684562683},{"id":"https://openalex.org/keywords/silicon-on-insulator","display_name":"Silicon on insulator","score":0.6072760820388794},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5124302506446838},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4924844205379486},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.4775848388671875},{"id":"https://openalex.org/keywords/noise-immunity","display_name":"Noise immunity","score":0.4772898256778717},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.46208664774894714},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.4568224549293518},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44829419255256653},{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.44577622413635254},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.44023847579956055},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.4217362403869629},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.42068907618522644},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4106801152229309},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.29018113017082214},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.2580617070198059},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1861034333705902},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.13716447353363037}],"concepts":[{"id":"https://openalex.org/C134786449","wikidata":"https://www.wikidata.org/wiki/Q3391255","display_name":"Planar","level":2,"score":0.7271945476531982},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.6431596875190735},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.628429651260376},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6157509684562683},{"id":"https://openalex.org/C53143962","wikidata":"https://www.wikidata.org/wiki/Q1478788","display_name":"Silicon on insulator","level":3,"score":0.6072760820388794},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5124302506446838},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4924844205379486},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.4775848388671875},{"id":"https://openalex.org/C2988494973","wikidata":"https://www.wikidata.org/wiki/Q179448","display_name":"Noise immunity","level":3,"score":0.4772898256778717},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.46208664774894714},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.4568224549293518},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44829419255256653},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.44577622413635254},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.44023847579956055},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.4217362403869629},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.42068907618522644},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4106801152229309},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.29018113017082214},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.2580617070198059},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1861034333705902},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.13716447353363037},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/isqed.2004.1283724","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2004.1283724","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720)","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.493.2261","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.493.2261","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/isqed04/pdffiles/p511.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8899999856948853}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1489322347","https://openalex.org/W1564694322","https://openalex.org/W1572946966","https://openalex.org/W1579930999","https://openalex.org/W1590842594","https://openalex.org/W2105470988","https://openalex.org/W2112752462","https://openalex.org/W2130836267","https://openalex.org/W2135818056","https://openalex.org/W2141178751","https://openalex.org/W2141263414","https://openalex.org/W2148247981","https://openalex.org/W2150952982","https://openalex.org/W2160580687","https://openalex.org/W2546351422","https://openalex.org/W4252499780","https://openalex.org/W6792905420"],"related_works":["https://openalex.org/W4290647047","https://openalex.org/W1500230652","https://openalex.org/W2066033226","https://openalex.org/W2363504003","https://openalex.org/W2548582980","https://openalex.org/W2620706469","https://openalex.org/W2052914698","https://openalex.org/W2088929465","https://openalex.org/W2612883256","https://openalex.org/W4386933833"],"abstract_inverted_index":{"The":[0],"quasi-planar":[1],"double-gate":[2],"FinFET":[3,79],"has":[4],"emerged":[5],"as":[6,95,97],"one":[7],"of":[8],"the":[9,14,29,68],"most":[10],"likely":[11],"successors":[12],"to":[13,36,57,105],"classical":[15],"planar":[16,22,47],"MOSFET":[17],"for":[18,75,131],"ultimate":[19],"scalability.":[20],"Unlike":[21],"devices,":[23],"its":[24],"channel":[25,39],"width":[26,40],"is":[27,34],"in":[28,60],"vertical":[30],"direction;":[31],"hence":[32,42],"it":[33],"possible":[35],"increase":[37],"effective":[38],"(and":[41],"drive":[43],"current)":[44],"per":[45],"unit":[46],"area":[48],"by":[49],"increasing":[50],"fin-height":[51],"(SOI":[52],"thickness).":[53],"This":[54],"translates":[55],"directly":[56],"improved":[58],"performance":[59],"interconnect-dominated":[61],"circuits.":[62],"In":[63],"this":[64],"paper":[65],"we":[66],"explore":[67],"joint":[69],"V/sub":[70,93,103],"dd/-fin-height-V/sub":[71],"t/":[72,104],"design":[73],"space":[74],"a":[76],"65":[77],"nm":[78],"SRAM.":[80],"We":[81],"report":[82],"that":[83],"69%":[84],"taller":[85],"fins":[86],"can":[87],"accommodate":[88],"18%":[89],"(140":[90],"mV)":[91,101],"lower":[92,110,114,118],"dd/":[94],"well":[96],"35":[98],"%":[99],"(70":[100],"higher":[102,122,128],"deliver":[106],"iso-performance":[107],"at":[108],"87%":[109],"sub-threshold":[111],"leakage,":[112,116],"50%":[113],"gate":[115],"25%":[117],"dynamic":[119],"energy,":[120],"13%":[121],"static":[123],"noise":[124],"margin":[125],"and":[126],"38%":[127],"critical":[129],"charge":[130],"soft-error":[132],"immunity.":[133]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2026-08-26T07:47:46.906454","created_date":"2025-10-10T00:00:00"}
