{"id":"https://openalex.org/W1804063983","doi":"https://doi.org/10.1109/isqed.2004.1283686","title":"PARADE: parametric delay evaluation under process variation [IC modeling]","display_name":"PARADE: parametric delay evaluation under process variation [IC modeling]","publication_year":2004,"publication_date":"2004-05-06","ids":{"openalex":"https://openalex.org/W1804063983","doi":"https://doi.org/10.1109/isqed.2004.1283686","mag":"1804063983"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2004.1283686","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2004.1283686","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084907779","display_name":"Xiang L\u00fc","orcid":"https://orcid.org/0000-0001-7169-7771"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Xiang Lu","raw_affiliation_strings":["Department of Electrical Engineering, Texas A and M University, College Station, TX, USA","Dept. of Electr Eng., Texas A&M Univ., College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr Eng., Texas A&M Univ., College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100448026","display_name":"Zhuo Li","orcid":"https://orcid.org/0000-0002-5535-5920"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhuo Li","raw_affiliation_strings":["Department of Electrical Engineering, Texas A and M University, College Station, TX, USA","Dept. of Electr Eng., Texas A&M Univ., College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr Eng., Texas A&M Univ., College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026748165","display_name":"Wangqi Qiu","orcid":null},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wangqi Qiu","raw_affiliation_strings":["Department of Computer Science, Texas A and M University, College Station, TX, USA","Dept. of Comput. Sci., Texas A & M Univ., College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Comput. Sci., Texas A & M Univ., College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027337337","display_name":"D.M.H. Walker","orcid":"https://orcid.org/0000-0002-4839-3830"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.M.H. Walker","raw_affiliation_strings":["Department of Computer Science, Texas A and M University, College Station, TX, USA","Dept. of Comput. Sci., Texas A & M Univ., College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Comput. Sci., Texas A & M Univ., College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109062444","display_name":"Welping Shi","orcid":null},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Welping Shi","raw_affiliation_strings":["Department of Electrical Engineering, Texas A and M University, College Station, TX, USA","[Department of Electrical Engineering, Texas A and M University, College Station, TX, USA]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"[Department of Electrical Engineering, Texas A and M University, College Station, TX, USA]","institution_ids":["https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5084907779"],"corresponding_institution_ids":["https://openalex.org/I91045830"],"apc_list":null,"apc_paid":null,"fwci":0.3388,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.6116326,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"276","last_page":"280"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/elmore-delay","display_name":"Elmore delay","score":0.827774703502655},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.7441172003746033},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.6808379888534546},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.6697967052459717},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.6638773083686829},{"id":"https://openalex.org/keywords/parametric-statistics","display_name":"Parametric statistics","score":0.6177056431770325},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5731054544448853},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.507609486579895},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.47269323468208313},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.45966872572898865},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.45235612988471985},{"id":"https://openalex.org/keywords/process-corners","display_name":"Process corners","score":0.41819238662719727},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.39415380358695984},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3014666736125946},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2847261428833008},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.1489681601524353},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12079751491546631}],"concepts":[{"id":"https://openalex.org/C84434228","wikidata":"https://www.wikidata.org/wiki/Q4531332","display_name":"Elmore delay","level":4,"score":0.827774703502655},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.7441172003746033},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.6808379888534546},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.6697967052459717},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.6638773083686829},{"id":"https://openalex.org/C117251300","wikidata":"https://www.wikidata.org/wiki/Q1849855","display_name":"Parametric statistics","level":2,"score":0.6177056431770325},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5731054544448853},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.507609486579895},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.47269323468208313},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.45966872572898865},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.45235612988471985},{"id":"https://openalex.org/C192615534","wikidata":"https://www.wikidata.org/wiki/Q7247268","display_name":"Process corners","level":3,"score":0.41819238662719727},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.39415380358695984},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3014666736125946},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2847261428833008},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.1489681601524353},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12079751491546631},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/isqed.2004.1283686","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2004.1283686","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720)","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.92.1854","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.92.1854","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://faculty.cs.tamu.edu/walker/5yrPapers/ISQED_PARADE_032004.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1967125811","https://openalex.org/W2105982376","https://openalex.org/W2107595540","https://openalex.org/W2117648153","https://openalex.org/W2120116751","https://openalex.org/W2121334524","https://openalex.org/W2123692429","https://openalex.org/W2126324865","https://openalex.org/W2126564504","https://openalex.org/W2135895868","https://openalex.org/W2137528577","https://openalex.org/W2138317689","https://openalex.org/W2140619390","https://openalex.org/W2142896025","https://openalex.org/W2145146339","https://openalex.org/W2148779942","https://openalex.org/W2149342513","https://openalex.org/W2157210245","https://openalex.org/W2161798746","https://openalex.org/W2167232152","https://openalex.org/W2170428543","https://openalex.org/W2534859347","https://openalex.org/W4229952597","https://openalex.org/W4234927513","https://openalex.org/W4236674018","https://openalex.org/W4254271670","https://openalex.org/W4254506919","https://openalex.org/W6678664461"],"related_works":["https://openalex.org/W2145535176","https://openalex.org/W1570180536","https://openalex.org/W4229446324","https://openalex.org/W2158805860","https://openalex.org/W1804063983","https://openalex.org/W2134944363","https://openalex.org/W2122901855","https://openalex.org/W2087387686","https://openalex.org/W3140640533","https://openalex.org/W2034793671"],"abstract_inverted_index":{"Under":[0],"manufacturing":[1],"process":[2,9,18,32,62,111],"variation,":[3,19],"the":[4,25,91,123,138,143],"circuit":[5],"delay":[6,12,27,59,71,102,125,145],"varies":[7],"with":[8],"parameters.":[10],"For":[11],"test":[13],"and":[14,79,109],"timing":[15],"verification":[16],"under":[17,61],"it":[20],"is":[21,131,147],"necessary":[22],"to":[23,37,90],"model":[24,99],"variational":[26],"as":[28,103],"a":[29,51,104],"function":[30,105],"of":[31,53,86,93,106,134],"variables.":[33],"However,":[34],"conventional":[35,84],"methods":[36,55,65,85,130],"generate":[38],"such":[39],"functions":[40],"are":[41,66,80],"either":[42,67],"slow":[43],"or":[44,73],"inaccurate.":[45],"In":[46],"this":[47],"paper,":[48],"we":[49,96],"present":[50],"number":[52],"new":[54],"for":[56],"fast":[57],"parametric":[58],"evaluation":[60],"variation.":[63],"Our":[64],"based":[68,74],"on":[69,75,118],"explicit":[70],"formulae":[72],"characterized":[76],"lookup":[77],"tables,":[78],"significantly":[81],"faster":[82],"than":[83],"comparable":[87],"accuracy.":[88],"Due":[89],"efficiency":[92],"our":[94,129],"method,":[95],"can":[97],"accurately":[98],"any":[100],"path":[101,124,144],"multiple":[107],"interconnect":[108],"device":[110],"variables":[112],"in":[113],"large":[114],"circuits.":[115],"Experimental":[116],"results":[117],"ISCAS85":[119],"circuits":[120],"show":[121],"that":[122,135],"error":[126],"predicted":[127],"by":[128,137],"about":[132],"1%":[133],"computed":[136],"RSM":[139],"using":[140],"SPICE,":[141],"where":[142],"variation":[146],"within":[148],"/spl":[149],"plusmn/10%.":[150]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
