{"id":"https://openalex.org/W2125077617","doi":"https://doi.org/10.1109/isqed.2004.1283675","title":"Test application time reduction for scan circuits using limited scan operations","display_name":"Test application time reduction for scan circuits using limited scan operations","publication_year":2004,"publication_date":"2004-05-06","ids":{"openalex":"https://openalex.org/W2125077617","doi":"https://doi.org/10.1109/isqed.2004.1283675","mag":"2125077617"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2004.1283675","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2004.1283675","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042394769","display_name":"Cho yonsang","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yonsang Cho","raw_affiliation_strings":["School of ECE, Purdue University, West Lafayette, IN, USA","Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of ECE, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032651920","display_name":"Irith Pomeranz","orcid":"https://orcid.org/0000-0002-5491-7282"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"I. Pomeranz","raw_affiliation_strings":["School of ECE, Purdue University, West Lafayette, IN, USA","Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of ECE, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077101123","display_name":"S.M. Reddy","orcid":"https://orcid.org/0000-0001-9208-8262"},"institutions":[{"id":"https://openalex.org/I126307644","display_name":"University of Iowa","ror":"https://ror.org/036jqmy94","country_code":"US","type":"education","lineage":["https://openalex.org/I126307644"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S.M. Reddy","raw_affiliation_strings":["ECE Department, University of Iowa, Iowa, IA, USA","[ECE Department, University of Iowa, Iowa, IA, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"ECE Department, University of Iowa, Iowa, IA, USA","institution_ids":["https://openalex.org/I126307644"]},{"raw_affiliation_string":"[ECE Department, University of Iowa, Iowa, IA, USA]","institution_ids":["https://openalex.org/I126307644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.824,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.68105943,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"211","last_page":"216"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9898999929428101,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scan-chain","display_name":"Scan chain","score":0.9009649157524109},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.7874720096588135},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.7013128995895386},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6471490859985352},{"id":"https://openalex.org/keywords/boundary-scan","display_name":"Boundary scan","score":0.643902599811554},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5970141887664795},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5918359160423279},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.5815595388412476},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.5795533061027527},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5569780468940735},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.5500124096870422},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5461410880088806},{"id":"https://openalex.org/keywords/automatic-test-equipment","display_name":"Automatic test equipment","score":0.5213738083839417},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5054259300231934},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.46897777915000916},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3832375109195709},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33772337436676025},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2728949189186096},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.23610645532608032},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19302791357040405},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.18942663073539734},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.1424921452999115},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10728934407234192},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09350809454917908}],"concepts":[{"id":"https://openalex.org/C150012182","wikidata":"https://www.wikidata.org/wiki/Q225990","display_name":"Scan chain","level":3,"score":0.9009649157524109},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.7874720096588135},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.7013128995895386},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6471490859985352},{"id":"https://openalex.org/C992767","wikidata":"https://www.wikidata.org/wiki/Q895156","display_name":"Boundary scan","level":3,"score":0.643902599811554},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5970141887664795},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5918359160423279},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.5815595388412476},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.5795533061027527},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5569780468940735},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.5500124096870422},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5461410880088806},{"id":"https://openalex.org/C141842801","wikidata":"https://www.wikidata.org/wiki/Q363815","display_name":"Automatic test equipment","level":3,"score":0.5213738083839417},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5054259300231934},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.46897777915000916},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3832375109195709},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33772337436676025},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2728949189186096},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.23610645532608032},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19302791357040405},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.18942663073539734},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.1424921452999115},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10728934407234192},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09350809454917908},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2004.1283675","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2004.1283675","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W2074302528","https://openalex.org/W2097936914","https://openalex.org/W2104118389","https://openalex.org/W2127079967","https://openalex.org/W2136066342","https://openalex.org/W2144852451","https://openalex.org/W2146594632","https://openalex.org/W2151526282","https://openalex.org/W2154258156","https://openalex.org/W2160670866","https://openalex.org/W2165326198","https://openalex.org/W2166632412","https://openalex.org/W2168885397","https://openalex.org/W3144472514","https://openalex.org/W4239144429","https://openalex.org/W4243061192"],"related_works":["https://openalex.org/W2117171289","https://openalex.org/W1852363244","https://openalex.org/W1501621551","https://openalex.org/W2888456858","https://openalex.org/W2127184179","https://openalex.org/W2049913894","https://openalex.org/W2061168866","https://openalex.org/W2080818541","https://openalex.org/W2537616607","https://openalex.org/W2129020400"],"abstract_inverted_index":{"We":[0,108],"describe":[1],"a":[2,12,26,48,65,70,74,82,91],"static":[3],"compaction":[4,131],"procedure":[5,10],"for":[6,17,132],"full-scan":[7],"circuits.":[8,134],"The":[9,38],"accepts":[11],"(compact)":[13],"test":[14,27,31,117,130],"set":[15,28],"generated":[16],"the":[18,22,54,59,99],"combinational":[19],"logic":[20],"of":[21,45,50,77,84,116,129],"circuit":[23],"and":[24,34,123],"produces":[25],"with":[29,64],"reduced":[30],"application":[32],"time":[33],"tester":[35],"memory,":[36],"requirements.":[37],"reductions":[39],"are":[40],"achieved":[41],"by":[42],"combining":[43],"pairs":[44,118],"tests.":[46],"When":[47],"pair":[49],"tests":[51,61,104],"is":[52,62,80,105],"combined,":[53],"scan":[55,67,72,75,100],"operation":[56,73,101],"required":[57],"between":[58,102],"two":[60,103],"replaced":[63],"limited":[66,71],"operation.":[68],"Under":[69],"chain":[76],"length":[78],"L":[79],"shifted":[81],"number":[83],"positions":[85],"S":[86,94],"/spl":[87],"les/":[88],"L.":[89],"As":[90],"special":[92],"case,":[93],"=":[95],"0":[96],"implies":[97],"that":[98,114],"eliminated":[106],"altogether.":[107],"introduce":[109],"several":[110],"techniques":[111],"to":[112],"ensure":[113],"consideration":[115],"can":[119],"be":[120],"done":[121],"efficiently":[122],"results":[124],"in":[125],"very":[126],"high":[127],"levels":[128],"benchmark":[133]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
