{"id":"https://openalex.org/W2163979107","doi":"https://doi.org/10.1109/isqed.2004.1283656","title":"New challenges emerging on the design of VLSI circuits made of MOSFETs using new gate dielectric materials","display_name":"New challenges emerging on the design of VLSI circuits made of MOSFETs using new gate dielectric materials","publication_year":2004,"publication_date":"2004-05-06","ids":{"openalex":"https://openalex.org/W2163979107","doi":"https://doi.org/10.1109/isqed.2004.1283656","mag":"2163979107"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2004.1283656","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2004.1283656","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087517264","display_name":"N. Konofaos","orcid":"https://orcid.org/0000-0003-2949-1184"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"N. Konofaos","raw_affiliation_strings":["Computer Engineering and Informatics Department, University of Patras, Rio-Patras, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Engineering and Informatics Department, University of Patras, Rio-Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053637778","display_name":"George Alexiou","orcid":"https://orcid.org/0000-0003-2244-4916"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"G.P. Alexiou","raw_affiliation_strings":["Computer Engineering and Informatics Department, University of Patras, Rio-Patras, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Engineering and Informatics Department, University of Patras, Rio-Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I174878644"],"apc_list":null,"apc_paid":null,"fwci":1.241,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.7997176,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"2","issue":null,"first_page":"92","last_page":"97"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.8086249828338623},{"id":"https://openalex.org/keywords/dielectric","display_name":"Dielectric","score":0.693995475769043},{"id":"https://openalex.org/keywords/gate-oxide","display_name":"Gate oxide","score":0.6414409875869751},{"id":"https://openalex.org/keywords/gate-dielectric","display_name":"Gate dielectric","score":0.6243935227394104},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5877455472946167},{"id":"https://openalex.org/keywords/high-\u03ba-dielectric","display_name":"High-\u03ba dielectric","score":0.5739485025405884},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5389872193336487},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5082539916038513},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5060808062553406},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.41405919194221497},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3924912214279175},{"id":"https://openalex.org/keywords/engineering-physics","display_name":"Engineering physics","score":0.3422354757785797},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33839327096939087},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3172946572303772},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2188689112663269},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1900624930858612},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.07507836818695068}],"concepts":[{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.8086249828338623},{"id":"https://openalex.org/C133386390","wikidata":"https://www.wikidata.org/wiki/Q184996","display_name":"Dielectric","level":2,"score":0.693995475769043},{"id":"https://openalex.org/C2361726","wikidata":"https://www.wikidata.org/wiki/Q5527031","display_name":"Gate oxide","level":4,"score":0.6414409875869751},{"id":"https://openalex.org/C166972891","wikidata":"https://www.wikidata.org/wiki/Q5527011","display_name":"Gate dielectric","level":4,"score":0.6243935227394104},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5877455472946167},{"id":"https://openalex.org/C16317505","wikidata":"https://www.wikidata.org/wiki/Q132013","display_name":"High-\u03ba dielectric","level":3,"score":0.5739485025405884},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5389872193336487},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5082539916038513},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5060808062553406},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.41405919194221497},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3924912214279175},{"id":"https://openalex.org/C61696701","wikidata":"https://www.wikidata.org/wiki/Q770766","display_name":"Engineering physics","level":1,"score":0.3422354757785797},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33839327096939087},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3172946572303772},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2188689112663269},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1900624930858612},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.07507836818695068}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2004.1283656","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2004.1283656","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W125753325","https://openalex.org/W1496024054","https://openalex.org/W1598341975","https://openalex.org/W1659914018","https://openalex.org/W1661368752","https://openalex.org/W1964755284","https://openalex.org/W1981196064","https://openalex.org/W1992981913","https://openalex.org/W1995226797","https://openalex.org/W2009485157","https://openalex.org/W2023834387","https://openalex.org/W2039033158","https://openalex.org/W2062418383","https://openalex.org/W2069407422","https://openalex.org/W2077642559","https://openalex.org/W2126810113","https://openalex.org/W2130850803","https://openalex.org/W2152152846","https://openalex.org/W2500008054","https://openalex.org/W3160787715"],"related_works":["https://openalex.org/W2074099177","https://openalex.org/W2796938634","https://openalex.org/W635954796","https://openalex.org/W2044018493","https://openalex.org/W2115152876","https://openalex.org/W1896204962","https://openalex.org/W2145041780","https://openalex.org/W2363136417","https://openalex.org/W2285713389","https://openalex.org/W1984876135"],"abstract_inverted_index":{"While":[0],"Quality":[1],"Electronic":[2],"Design":[3],"issues":[4,25,74],"regarding":[5,26],"typical":[6],"MOSFETs":[7,30],"constructed":[8],"by":[9],"well":[10],"established":[11],"techniques":[12],"and":[13,60,110,135],"made":[14,33],"of":[15,29,34,83,97,105,129],"SiO/sub":[16,40,106],"2/":[17,41,107],"gate":[18],"dielectrics":[19],"are":[20,42,75,112],"yet":[21],"to":[22,65],"optimised,":[23],"new":[24,88],"the":[27,46,52,84,95,130],"implementation":[28],"having":[31],"gates":[32],"high-k":[35],"dielectric":[36,54],"materials":[37],"other":[38],"than":[39,103],"being":[43],"raised":[44],"during":[45],"last":[47],"years.":[48],"Parameters":[49],"such":[50,73],"as":[51],"high":[53],"constant":[55],"values,":[56],"extra":[57],"oxide":[58],"charges":[59],"process":[61],"related":[62],"defects":[63],"have":[64],"be":[66],"taken":[67],"into":[68,93],"account.":[69],"In":[70],"this":[71],"paper,":[72],"addressed.":[76],"The":[77],"case":[78,116],"replacing":[79],"commonly":[80],"used":[81],"parameters":[82],"MOSFET":[85],"modelling":[86],"with":[87,100],"ones":[89],"that":[90,104],"will":[91],"take":[92],"account":[94],"presence":[96],"a":[98,115,121],"material":[99],"different":[101],"properties":[102],"is":[108,118,124,133,138],"presented":[109],"proposals":[111],"made.":[113],"Moreover,":[114],"study":[117],"presented,":[119],"where":[120],"memory":[122],"device":[123],"examined.":[125],"An":[126],"overall":[127],"estimation":[128],"proposed":[131],"procedure":[132],"attempted":[134],"further":[136],"work":[137],"proposed.":[139]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}