{"id":"https://openalex.org/W2113113331","doi":"https://doi.org/10.1109/isqed.2004.1283647","title":"Automatic generation of standard cell library in VDSM technologies","display_name":"Automatic generation of standard cell library in VDSM technologies","publication_year":2004,"publication_date":"2004-05-06","ids":{"openalex":"https://openalex.org/W2113113331","doi":"https://doi.org/10.1109/isqed.2004.1283647","mag":"2113113331"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2004.1283647","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2004.1283647","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002405139","display_name":"Masanori Hashimoto","orcid":"https://orcid.org/0000-0002-0377-2108"},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Hashimoto","raw_affiliation_strings":["Department of Communications and Computer Engineering, Kyoto University, Japan","Dept. of Commun. & Comput. Eng., Kyoto Univ., Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Japan","institution_ids":["https://openalex.org/I22299242"]},{"raw_affiliation_string":"Dept. of Commun. & Comput. Eng., Kyoto Univ., Japan","institution_ids":["https://openalex.org/I22299242"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110089242","display_name":"Kunio Fujimori","orcid":null},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"K. Fujimori","raw_affiliation_strings":["Department of Communications and Computer Engineering, Kyoto University, Japan","Dept. of Commun. & Comput. Eng., Kyoto Univ., Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Japan","institution_ids":["https://openalex.org/I22299242"]},{"raw_affiliation_string":"Dept. of Commun. & Comput. Eng., Kyoto Univ., Japan","institution_ids":["https://openalex.org/I22299242"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026865951","display_name":"Hidetoshi Onodera","orcid":"https://orcid.org/0000-0001-5198-0668"},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Onodera","raw_affiliation_strings":["Department of Communications and Computer Engineering, Kyoto University, Japan","Dept. of Commun. & Comput. Eng., Kyoto Univ., Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Communications and Computer Engineering, Kyoto University, Japan","institution_ids":["https://openalex.org/I22299242"]},{"raw_affiliation_string":"Dept. of Commun. & Comput. Eng., Kyoto Univ., Japan","institution_ids":["https://openalex.org/I22299242"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I22299242"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.13695893,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"36","last_page":"41"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.8033797740936279},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6491603851318359},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34412631392478943},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3285439610481262},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23218515515327454},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.20995458960533142},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12319883704185486}],"concepts":[{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.8033797740936279},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6491603851318359},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34412631392478943},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3285439610481262},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23218515515327454},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.20995458960533142},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12319883704185486}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/isqed.2004.1283647","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2004.1283647","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720)","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.176.7210","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.176.7210","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www-ise2.ist.osaka-u.ac.jp/%7Ehasimoto/pman2/data/pdf/53.PDF","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1561480662","https://openalex.org/W1935785799","https://openalex.org/W2065134004","https://openalex.org/W2126983197"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W4396696052","https://openalex.org/W4402327032","https://openalex.org/W2382290278"],"abstract_inverted_index":{"We":[0],"developed":[1,53],"standard":[2],"cell":[3],"libraries":[4,54,60,67],"for":[5],"three":[6],"technologies":[7],"(130,":[8],"180":[9],"and":[10,38,43,64,84],"350":[11],"nm)":[12],"using":[13],"an":[14],"automatic":[15,24],"layout":[16,25,62],"generation":[17,26],"tool":[18,27],"that":[19],"we":[20,77],"have":[21],"developed.":[22],"The":[23,52,66],"is":[28],"improved":[29],"so":[30],"as":[31,56,58],"to":[32,71],"cope":[33],"with":[34],"phase":[35],"shift":[36],"mask":[37],"mismatch":[39],"between":[40],"transistor":[41],"pitch":[42],"wire":[44],"pitch,":[45],"which":[46],"appear":[47],"commonly":[48],"in":[49,61,74],"VDSM":[50],"technologies.":[51],"are":[55,68],"competitive":[57],"manually-designed":[59],"density":[63],"speed.":[65],"currently":[69],"public":[70],"educational":[72],"organizations":[73],"Japan":[75],"after":[76],"verified":[78],"the":[79,85,92],"functionalities":[80],"of":[81,87],"all":[82],"cells":[83,90],"speed":[86],"basic":[88],"combinational":[89],"on":[91],"fabricated":[93],"chips.":[94]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2}],"updated_date":"2026-08-26T07:47:46.906454","created_date":"2025-10-10T00:00:00"}
