{"id":"https://openalex.org/W2116275611","doi":"https://doi.org/10.1109/isqed.2003.1194723","title":"The iFlow design factory: evolving chip design from an art to a process, through adaptive resource management, and qualified data exchange","display_name":"The iFlow design factory: evolving chip design from an art to a process, through adaptive resource management, and qualified data exchange","publication_year":2004,"publication_date":"2004-03-22","ids":{"openalex":"https://openalex.org/W2116275611","doi":"https://doi.org/10.1109/isqed.2003.1194723","mag":"2116275611"},"language":"en","primary_location":{"id":"doi:10.1109/isqed.2003.1194723","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2003.1194723","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Fourth International Symposium on Quality Electronic Design, 2003. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084297119","display_name":"Gilles-Eric Descamps","orcid":null},"institutions":[{"id":"https://openalex.org/I93085520","display_name":"Silicon Labs (United States)","ror":"https://ror.org/02dyqfb80","country_code":"US","type":"company","lineage":["https://openalex.org/I93085520"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"G.-E. Descamps","raw_affiliation_strings":["Silicon Access Networks, San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Silicon Access Networks, San Jose, CA, USA","institution_ids":["https://openalex.org/I93085520"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003468925","display_name":"Satish Bagalkotkar","orcid":null},"institutions":[{"id":"https://openalex.org/I93085520","display_name":"Silicon Labs (United States)","ror":"https://ror.org/02dyqfb80","country_code":"US","type":"company","lineage":["https://openalex.org/I93085520"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Bagalkotkar","raw_affiliation_strings":["Silicon Access Networks, San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Silicon Access Networks, San Jose, CA, USA","institution_ids":["https://openalex.org/I93085520"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005537270","display_name":"Subramaniam Ganesan","orcid":"https://orcid.org/0000-0003-0233-9940"},"institutions":[{"id":"https://openalex.org/I93085520","display_name":"Silicon Labs (United States)","ror":"https://ror.org/02dyqfb80","country_code":"US","type":"company","lineage":["https://openalex.org/I93085520"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Ganesan","raw_affiliation_strings":["Silicon Access Networks, San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Silicon Access Networks, San Jose, CA, USA","institution_ids":["https://openalex.org/I93085520"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042830832","display_name":"Suresh Subramaniam","orcid":"https://orcid.org/0000-0003-1501-5953"},"institutions":[{"id":"https://openalex.org/I93085520","display_name":"Silicon Labs (United States)","ror":"https://ror.org/02dyqfb80","country_code":"US","type":"company","lineage":["https://openalex.org/I93085520"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Subramaniam","raw_affiliation_strings":["Silicon Access Networks, San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Silicon Access Networks, San Jose, CA, USA","institution_ids":["https://openalex.org/I93085520"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045206023","display_name":"H. Hingarh","orcid":null},"institutions":[{"id":"https://openalex.org/I93085520","display_name":"Silicon Labs (United States)","ror":"https://ror.org/02dyqfb80","country_code":"US","type":"company","lineage":["https://openalex.org/I93085520"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"H. Hingarh","raw_affiliation_strings":["Silicon Access Networks, San Jose, CA, USA"],"affiliations":[{"raw_affiliation_string":"Silicon Access Networks, San Jose, CA, USA","institution_ids":["https://openalex.org/I93085520"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5084297119"],"corresponding_institution_ids":["https://openalex.org/I93085520"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.18962475,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"144","last_page":"149"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9905999898910522,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9854000210762024,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6025753021240234},{"id":"https://openalex.org/keywords/factory","display_name":"Factory (object-oriented programming)","score":0.5147135853767395},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.4289686381816864},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.426360547542572},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.41749250888824463},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39401331543922424},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.33453893661499023},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25731831789016724},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.11414939165115356}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6025753021240234},{"id":"https://openalex.org/C40149104","wikidata":"https://www.wikidata.org/wiki/Q5620977","display_name":"Factory (object-oriented programming)","level":2,"score":0.5147135853767395},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.4289686381816864},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.426360547542572},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.41749250888824463},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39401331543922424},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.33453893661499023},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25731831789016724},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.11414939165115356},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isqed.2003.1194723","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isqed.2003.1194723","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Fourth International Symposium on Quality Electronic Design, 2003. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4699999988079071,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1491611668","https://openalex.org/W2121057544","https://openalex.org/W2142098249","https://openalex.org/W2142497484","https://openalex.org/W2166973989","https://openalex.org/W2170589017","https://openalex.org/W2910951549","https://openalex.org/W4232005705","https://openalex.org/W4240809582"],"related_works":["https://openalex.org/W2165367082","https://openalex.org/W1972641423","https://openalex.org/W611446063","https://openalex.org/W1996322406","https://openalex.org/W2384486034","https://openalex.org/W4206938017","https://openalex.org/W1967064512","https://openalex.org/W2388299947","https://openalex.org/W2382673458","https://openalex.org/W2361380273"],"abstract_inverted_index":{"With":[0],"advancing":[1],"semiconductor":[2],"technology,":[3],"growing":[4],"design":[5,13,107,124,140,156],"complexities,":[6],"companies":[7],"have":[8],"turned":[9],"to":[10,15,29,84,111,137],"a":[11,20,48,75,165,202],"global":[12,206],"team":[14],"build":[16],"their":[17],"system":[18],"on":[19,175],"chip":[21,123,139],"(SoC).":[22],"The":[23],"major":[24],"challenge":[25],"is":[26],"the":[27,86,100,130,138,150,177],"capacity":[28],"scale":[30],"infrastructure":[31],"and":[32,68,74,80,145,180,198],"methodology,":[33],"along":[34],"with":[35],"ASIC":[36],"design.":[37],"Silicon":[38,104],"Access":[39,105],"Networks":[40],"recently":[41],"shipped":[42],"for":[43,170],"revenue":[44],"from":[45],"first":[46],"silicon,":[47],"family":[49],"of":[50,77,99,103,129,193],"four":[51],"high":[52],"performance":[53,89],"SoC":[54],"products.":[55],"These":[56],"high-end":[57],"networking":[58],"products":[59],"were":[60,135,149],"designed":[61],"in":[62,121,159,188,201],"state-of-the-art":[63],"0.13":[64],"/spl":[65],"mu/m":[66],"process":[67],"collectively":[69],"had":[70],"about":[71],"750-million":[72],"transistors":[73],"variety":[76],"analog,":[78],"digital":[79],"memory":[81],"functional":[82],"blocks":[83],"provide":[85],"industry's":[87],"highest":[88],"OC-192":[90],"Data":[91],"Plane":[92],"Processing":[93],"solution.":[94],"This":[95],"paper":[96],"describes":[97],"some":[98],"key":[101],"aspects":[102],"Networks'":[106],"methodology":[108],"that":[109],"enabled":[110],"accomplish":[112],"repeatable":[113],"\"first":[114],"pass":[115],"silicon\"":[116],"successes.":[117],"We":[118],"gained":[119],"predictability":[120],"our":[122],"cycle":[125],"through":[126],"real-time":[127],"visibility":[128],"processes.":[131],"Quality":[132],"enhancing":[133],"strategies":[134],"applied":[136],"cycles.":[141],"Adaptive":[142],"resource":[143],"management,":[144],"qualified":[146],"data":[147,179],"exchange":[148],"two":[151],"main":[152],"techniques.":[153],"Multi":[154],"site":[155],"teams":[157],"working":[158],"different":[160],"time":[161],"zones":[162],"may":[163,168],"be":[164],"pitfall,":[166],"or":[167],"allow":[169],"true":[171],"24/7":[172],"operation,":[173],"depending":[174],"whether":[176],"right":[178],"resources":[181,194],"are":[182],"available.":[183],"Building":[184],"such":[185],"large":[186],"designs":[187],"parallel":[189],"requires":[190],"efficient":[191],"management":[192],"-":[195,200],"machines,":[196],"tools":[197],"users":[199],"transparent":[203],"but":[204],"truly":[205],"environment.":[207]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}