{"id":"https://openalex.org/W2416722775","doi":"https://doi.org/10.1109/ispass.2016.7482091","title":"Observations and opportunities in architecting shared virtual memory for heterogeneous systems","display_name":"Observations and opportunities in architecting shared virtual memory for heterogeneous systems","publication_year":2016,"publication_date":"2016-04-01","ids":{"openalex":"https://openalex.org/W2416722775","doi":"https://doi.org/10.1109/ispass.2016.7482091","mag":"2416722775"},"language":"en","primary_location":{"id":"doi:10.1109/ispass.2016.7482091","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispass.2016.7482091","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014581637","display_name":"J\u00e1n Vesel\u00fd","orcid":null},"institutions":[{"id":"https://openalex.org/I4210096112","display_name":"Rutgers Sexual and Reproductive Health and Rights","ror":"https://ror.org/00rcvgx40","country_code":"NL","type":"other","lineage":["https://openalex.org/I4210096112"]},{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA","NL"],"is_corresponding":true,"raw_author_name":"Jan Vesely","raw_affiliation_strings":["AMD Research, Advanced Micro Devices, Inc","Department of Computer Science, Rutgers University"],"affiliations":[{"raw_affiliation_string":"AMD Research, Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]},{"raw_affiliation_string":"Department of Computer Science, Rutgers University","institution_ids":["https://openalex.org/I4210096112"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111673340","display_name":"Arkaprava Basu","orcid":"https://orcid.org/0000-0002-3466-4556"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Arkaprava Basu","raw_affiliation_strings":["AMD Research, Advanced Micro Devices, Inc"],"affiliations":[{"raw_affiliation_string":"AMD Research, Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063231555","display_name":"Mark Oskin","orcid":null},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mark Oskin","raw_affiliation_strings":["AMD Research, Advanced Micro Devices, Inc"],"affiliations":[{"raw_affiliation_string":"AMD Research, Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102835155","display_name":"Gabriel H. Loh","orcid":"https://orcid.org/0000-0002-4616-0144"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Gabriel H. Loh","raw_affiliation_strings":["AMD Research, Advanced Micro Devices, Inc"],"affiliations":[{"raw_affiliation_string":"AMD Research, Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5019487275","display_name":"Abhishek Bhattacharjee","orcid":"https://orcid.org/0000-0003-2742-2679"},"institutions":[{"id":"https://openalex.org/I4210096112","display_name":"Rutgers Sexual and Reproductive Health and Rights","ror":"https://ror.org/00rcvgx40","country_code":"NL","type":"other","lineage":["https://openalex.org/I4210096112"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Abhishek Bhattacharjee","raw_affiliation_strings":["Department of Computer Science, Rutgers University"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Rutgers University","institution_ids":["https://openalex.org/I4210096112"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5014581637"],"corresponding_institution_ids":["https://openalex.org/I1311921367","https://openalex.org/I4210096112"],"apc_list":null,"apc_paid":null,"fwci":17.2787,"has_fulltext":false,"cited_by_count":96,"citation_normalized_percentile":{"value":0.99645003,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"161","last_page":"171"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/translation-lookaside-buffer","display_name":"Translation lookaside buffer","score":0.9477338790893555},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8430107831954956},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.5687143206596375},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5487545132637024},{"id":"https://openalex.org/keywords/virtual-memory","display_name":"Virtual memory","score":0.5335707068443298},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.5090815424919128},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4866521954536438},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.4747267961502075},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4588911831378937},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.43567758798599243},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.42187976837158203},{"id":"https://openalex.org/keywords/virtual-machine","display_name":"Virtual machine","score":0.41417601704597473},{"id":"https://openalex.org/keywords/supercomputer","display_name":"Supercomputer","score":0.41252994537353516},{"id":"https://openalex.org/keywords/physical-address","display_name":"Physical address","score":0.4108615517616272},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4090331494808197},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3957780599594116},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3707616627216339},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.24154794216156006}],"concepts":[{"id":"https://openalex.org/C116007543","wikidata":"https://www.wikidata.org/wiki/Q1071403","display_name":"Translation lookaside buffer","level":4,"score":0.9477338790893555},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8430107831954956},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.5687143206596375},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5487545132637024},{"id":"https://openalex.org/C76399640","wikidata":"https://www.wikidata.org/wiki/Q189401","display_name":"Virtual memory","level":4,"score":0.5335707068443298},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.5090815424919128},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4866521954536438},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.4747267961502075},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4588911831378937},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.43567758798599243},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.42187976837158203},{"id":"https://openalex.org/C25344961","wikidata":"https://www.wikidata.org/wiki/Q192726","display_name":"Virtual machine","level":2,"score":0.41417601704597473},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.41252994537353516},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.4108615517616272},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4090331494808197},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3957780599594116},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3707616627216339},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.24154794216156006},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ispass.2016.7482091","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispass.2016.7482091","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.47999998927116394,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1997113918","https://openalex.org/W2004807638","https://openalex.org/W2020733012","https://openalex.org/W2032617224","https://openalex.org/W2036250095","https://openalex.org/W2041195705","https://openalex.org/W2047240985","https://openalex.org/W2047390994","https://openalex.org/W2049403384","https://openalex.org/W2061812855","https://openalex.org/W2062430565","https://openalex.org/W2077076195","https://openalex.org/W2082000934","https://openalex.org/W2093828978","https://openalex.org/W2095954861","https://openalex.org/W2100926301","https://openalex.org/W2120138088","https://openalex.org/W2120715680","https://openalex.org/W2133043233","https://openalex.org/W2146241244","https://openalex.org/W2170794761","https://openalex.org/W2238595726"],"related_works":["https://openalex.org/W2475386486","https://openalex.org/W2381395788","https://openalex.org/W3015096516","https://openalex.org/W743995","https://openalex.org/W2017119312","https://openalex.org/W4318969896","https://openalex.org/W2355566153","https://openalex.org/W4238135788","https://openalex.org/W2350803493","https://openalex.org/W2119502203"],"abstract_inverted_index":{"Computing":[0],"is":[1,27,87,129,149],"becoming":[2],"increasingly":[3],"heterogeneous":[4],"with":[5,12],"accelerators":[6,26,33,159],"like":[7,160],"GPUs":[8],"being":[9],"tightly":[10],"integrated":[11,52,172],"CPUs":[13],"on":[14],"the":[15,19,48,70,82,106,112,115,136,144],"same":[16],"die.":[17],"Extending":[18],"CPU's":[20],"virtual":[21,45],"addressing":[22],"mechanism":[23],"to":[24,89,95,126],"these":[25,176],"a":[28,66,164,169],"key":[29,57],"step":[30],"in":[31,102,120],"making":[32],"easily":[34],"programmable.":[35],"In":[36],"this":[37,97,127],"work,":[38],"we":[39],"analyze,":[40],"using":[41],"real-system":[42],"measurements,":[43],"shared":[44],"memory":[46,103,116],"across":[47],"CPU":[49,83,145],"and":[50,59,84,118,131,146,178],"an":[51,74],"GPU.":[53],"We":[54,162],"make":[55],"several":[56],"observations":[58],"highlight":[60],"consequent":[61],"research":[62,119,181],"opportunities:":[63],"(1)":[64],"servicing":[65],"TLB":[67,93],"miss":[68],"from":[69,81,135,143,157],"GPU":[71,137],"can":[72],"be":[73],"order":[75],"of":[76,114,154,168],"magnitude":[77],"slower":[78,140],"than":[79,111,141],"that":[80,142,174],"consequently":[85],"it":[86],"imperative":[88],"enable":[90],"many":[91],"concurrent":[92],"misses":[94],"hide":[96],"larger":[98],"latency;":[99],"(2)":[100],"divergence":[101],"accesses":[104],"impacts":[105],"GPU's":[107],"address":[108,122],"translation":[109,123],"more":[110],"rest":[113],"hierarchy,":[117],"designing":[121],"mechanisms":[124],"tolerant":[125],"effect":[128],"imperative;":[130],"(3)":[132],"page":[133,155],"faults":[134,156],"are":[138],"considerably":[139],"software-hardware":[147],"co-design":[148],"essential":[150],"for":[151],"efficient":[152],"implementation":[153],"throughput-oriented":[158],"GPUs.":[161],"present":[163],"detailed":[165],"measurement":[166],"study":[167],"commercially":[170],"available":[171],"APU":[173],"illustrates":[175],"effects":[177],"motivates":[179],"future":[180],"opportunities.":[182]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":7},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":12},{"year":2019,"cited_by_count":10},{"year":2018,"cited_by_count":17},{"year":2017,"cited_by_count":24},{"year":2016,"cited_by_count":3}],"updated_date":"2026-04-11T08:14:18.477133","created_date":"2025-10-10T00:00:00"}
