{"id":"https://openalex.org/W2074504559","doi":"https://doi.org/10.1109/ispass.2012.6189224","title":"Fast and cycle-accurate modeling of a multicore processor","display_name":"Fast and cycle-accurate modeling of a multicore processor","publication_year":2012,"publication_date":"2012-04-01","ids":{"openalex":"https://openalex.org/W2074504559","doi":"https://doi.org/10.1109/ispass.2012.6189224","mag":"2074504559"},"language":"en","primary_location":{"id":"doi:10.1109/ispass.2012.6189224","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispass.2012.6189224","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International Symposium on Performance Analysis of Systems & Software","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057444621","display_name":"Asif Khan","orcid":"https://orcid.org/0000-0003-4530-8263"},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Asif Khan","raw_affiliation_strings":["Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, MA, USA","Computer Science and Artificial, Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, USA"],"affiliations":[{"raw_affiliation_string":"Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"Computer Science and Artificial, Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, USA","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080480437","display_name":"Muralidaran Vijayaraghavan","orcid":null},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Muralidaran Vijayaraghavan","raw_affiliation_strings":["Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, MA, USA","Computer Science and Artificial, Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, USA"],"affiliations":[{"raw_affiliation_string":"Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"Computer Science and Artificial, Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, USA","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075638962","display_name":"Silas Boyd-Wickizer","orcid":null},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Silas Boyd-Wickizer","raw_affiliation_strings":["Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, MA, USA","Computer Science and Artificial, Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, USA"],"affiliations":[{"raw_affiliation_string":"Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"Computer Science and Artificial, Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, USA","institution_ids":["https://openalex.org/I63966007"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060692552","display_name":"Arvind Arvind","orcid":null},"institutions":[{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arvind","raw_affiliation_strings":["Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, MA, USA","Computer Science and Artificial, Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, USA"],"affiliations":[{"raw_affiliation_string":"Computer Science and Artificial Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, MA, USA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"Computer Science and Artificial, Intelligence Laboratory, Massachusetts Institute of Technology, Cambridge, USA","institution_ids":["https://openalex.org/I63966007"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5057444621"],"corresponding_institution_ids":["https://openalex.org/I63966007"],"apc_list":null,"apc_paid":null,"fwci":2.3422,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.88440666,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"178","last_page":"187"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8655040264129639},{"id":"https://openalex.org/keywords/parsec","display_name":"Parsec","score":0.6658613681793213},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6464207172393799},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.6070036292076111},{"id":"https://openalex.org/keywords/fidelity","display_name":"Fidelity","score":0.6033506393432617},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.6029509902000427},{"id":"https://openalex.org/keywords/suite","display_name":"Suite","score":0.5443212389945984},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5317589044570923},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5018246173858643},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.48806512355804443},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.44290992617607117},{"id":"https://openalex.org/keywords/computer-architecture-simulator","display_name":"Computer architecture simulator","score":0.43439170718193054},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.42776787281036377},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.41788220405578613},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36327314376831055},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.3322860598564148},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.3296005427837372},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.18004614114761353}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8655040264129639},{"id":"https://openalex.org/C44060867","wikidata":"https://www.wikidata.org/wiki/Q12129","display_name":"Parsec","level":3,"score":0.6658613681793213},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6464207172393799},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.6070036292076111},{"id":"https://openalex.org/C2776459999","wikidata":"https://www.wikidata.org/wiki/Q2119376","display_name":"Fidelity","level":2,"score":0.6033506393432617},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.6029509902000427},{"id":"https://openalex.org/C79581498","wikidata":"https://www.wikidata.org/wiki/Q1367530","display_name":"Suite","level":2,"score":0.5443212389945984},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5317589044570923},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5018246173858643},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.48806512355804443},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.44290992617607117},{"id":"https://openalex.org/C201203610","wikidata":"https://www.wikidata.org/wiki/Q5157524","display_name":"Computer architecture simulator","level":2,"score":0.43439170718193054},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.42776787281036377},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.41788220405578613},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36327314376831055},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.3322860598564148},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.3296005427837372},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.18004614114761353},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.0},{"id":"https://openalex.org/C150846664","wikidata":"https://www.wikidata.org/wiki/Q7602306","display_name":"Stars","level":2,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C166957645","wikidata":"https://www.wikidata.org/wiki/Q23498","display_name":"Archaeology","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C95457728","wikidata":"https://www.wikidata.org/wiki/Q309","display_name":"History","level":0,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ispass.2012.6189224","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispass.2012.6189224","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International Symposium on Performance Analysis of Systems & Software","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.309.9576","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.309.9576","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://pdos.csail.mit.edu/~sbw/khan-modeling.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4399999976158142}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":35,"referenced_works":["https://openalex.org/W13759931","https://openalex.org/W1487204394","https://openalex.org/W1522250664","https://openalex.org/W1548550040","https://openalex.org/W1938553034","https://openalex.org/W1970939331","https://openalex.org/W1980257390","https://openalex.org/W1983899098","https://openalex.org/W2025816492","https://openalex.org/W2044206819","https://openalex.org/W2057962492","https://openalex.org/W2099129242","https://openalex.org/W2108204620","https://openalex.org/W2120635877","https://openalex.org/W2128403399","https://openalex.org/W2134470641","https://openalex.org/W2136084694","https://openalex.org/W2137385009","https://openalex.org/W2140894580","https://openalex.org/W2150412589","https://openalex.org/W2155066383","https://openalex.org/W2155764480","https://openalex.org/W2157225945","https://openalex.org/W2159158923","https://openalex.org/W2161522487","https://openalex.org/W2164264749","https://openalex.org/W2168113051","https://openalex.org/W3137094666","https://openalex.org/W4231633798","https://openalex.org/W4233187670","https://openalex.org/W4251534053","https://openalex.org/W6600540968","https://openalex.org/W6629220744","https://openalex.org/W6631155369","https://openalex.org/W6681906569"],"related_works":["https://openalex.org/W2153288182","https://openalex.org/W249464484","https://openalex.org/W146324612","https://openalex.org/W1579918296","https://openalex.org/W2143904576","https://openalex.org/W2086259793","https://openalex.org/W1993578844","https://openalex.org/W3194406605","https://openalex.org/W2133462582","https://openalex.org/W2074504559"],"abstract_inverted_index":{"An":[0],"ideal":[1],"simulator":[2,44],"allows":[3],"an":[4,87,166,173],"architect":[5],"to":[6,22,144,194],"swiftly":[7],"explore":[8],"design":[9],"alternatives":[10],"and":[11,26,98,115,122,134,164,188],"accurately":[12],"determine":[13],"their":[14],"impact":[15],"on":[16,136,158],"performance.":[17],"Design":[18],"exploration":[19],"requires":[20],"simulators":[21,68],"be":[23,46,56],"easily":[24],"modifiable,":[25],"accurate":[27],"performance":[28,94,141,168],"estimates":[29],"require":[30],"detailed":[31,34,116],"models.":[32],"Unfortunately,":[33],"modeling":[35],"not":[36],"only":[37],"impacts":[38],"the":[39,50,154,189,195],"ease":[40],"with":[41,96,102],"which":[42,53,91,110],"a":[43,103,107,140,151],"can":[45,55],"modified,":[47],"but":[48],"also":[49,176],"speed":[51,72],"at":[52],"it":[54],"executed,":[57],"resulting":[58],"in":[59],"fidelity":[60,77],"being":[61],"traded":[62],"for":[63,172],"simulation":[64],"speed.":[65],"Although":[66],"FPGA-based":[67,88],"have":[69],"dramatically":[70],"higher":[71],"than":[73],"software":[74],"simulators,":[75],"sacrificing":[76],"is":[78,131],"still":[79],"common.":[80],"In":[81],"this":[82,129],"paper":[83],"we":[84],"present":[85],"Arete,":[86],"processor":[89],"simulator,":[90],"offers":[92],"high":[93],"along":[95],"accuracy":[97],"modifiability.":[99],"We":[100,125,149],"begin":[101],"cycle-level":[104],"specification":[105,130],"of":[106,118,142,153,160,169],"multicore":[108],"architecture":[109],"includes":[111],"realistic":[112],"in-order":[113],"cores":[114],"models":[117],"shared,":[119],"coherent":[120],"memory":[121],"on-chip":[123],"network.":[124],"then":[126],"describe":[127,177],"how":[128],"implemented":[132],"faithfully":[133],"efficiently":[135],"FPGAs.":[137],"Arete":[138],"delivers":[139],"up":[143],"11":[145],"MIPS":[146,171],"per":[147],"core.":[148],"run":[150],"subset":[152],"PARSEC":[155],"benchmark":[156],"suite":[157],"top":[159],"off-the-shelf":[161],"SMP":[162],"Linux,":[163],"achieve":[165],"average":[167],"55":[170],"8-core":[174],"model.We":[175],"two":[178],"significant":[179],"architectural":[180],"explorations:":[181],"one":[182],"involving":[183],"three":[184],"different":[185],"branch":[186],"predictors":[187],"other":[190],"requiring":[191],"major":[192],"modifications":[193],"cache-coherence":[196],"protocol.":[197]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":4},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}