{"id":"https://openalex.org/W2783037611","doi":"https://doi.org/10.1109/ispacs.2017.8266523","title":"SAR TDC architecture for one-shot timing measurement with full digital implementation","display_name":"SAR TDC architecture for one-shot timing measurement with full digital implementation","publication_year":2017,"publication_date":"2017-11-01","ids":{"openalex":"https://openalex.org/W2783037611","doi":"https://doi.org/10.1109/ispacs.2017.8266523","mag":"2783037611"},"language":"en","primary_location":{"id":"doi:10.1109/ispacs.2017.8266523","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispacs.2017.8266523","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112342449","display_name":"Yuki Ozawa","orcid":"https://orcid.org/0000-0002-5804-9128"},"institutions":[{"id":"https://openalex.org/I258063972","display_name":"Kiryu University","ror":"https://ror.org/02snehe53","country_code":"JP","type":"education","lineage":["https://openalex.org/I258063972"]},{"id":"https://openalex.org/I165735259","display_name":"Gunma University","ror":"https://ror.org/046fm7598","country_code":"JP","type":"education","lineage":["https://openalex.org/I165735259"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Yuki Ozawa","raw_affiliation_strings":["Division of Electronics and Informatics, Gunma University, Kiryu, Japan"],"affiliations":[{"raw_affiliation_string":"Division of Electronics and Informatics, Gunma University, Kiryu, Japan","institution_ids":["https://openalex.org/I258063972","https://openalex.org/I165735259"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069007204","display_name":"Takashi Ida","orcid":"https://orcid.org/0000-0003-0688-5076"},"institutions":[{"id":"https://openalex.org/I258063972","display_name":"Kiryu University","ror":"https://ror.org/02snehe53","country_code":"JP","type":"education","lineage":["https://openalex.org/I258063972"]},{"id":"https://openalex.org/I165735259","display_name":"Gunma University","ror":"https://ror.org/046fm7598","country_code":"JP","type":"education","lineage":["https://openalex.org/I165735259"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Takashi Ida","raw_affiliation_strings":["Division of Electronics and Informatics, Gunma University, Kiryu, Japan"],"affiliations":[{"raw_affiliation_string":"Division of Electronics and Informatics, Gunma University, Kiryu, Japan","institution_ids":["https://openalex.org/I258063972","https://openalex.org/I165735259"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013408544","display_name":"Shotaro Sakurai","orcid":null},"institutions":[{"id":"https://openalex.org/I258063972","display_name":"Kiryu University","ror":"https://ror.org/02snehe53","country_code":"JP","type":"education","lineage":["https://openalex.org/I258063972"]},{"id":"https://openalex.org/I165735259","display_name":"Gunma University","ror":"https://ror.org/046fm7598","country_code":"JP","type":"education","lineage":["https://openalex.org/I165735259"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Shotaro Sakurai","raw_affiliation_strings":["Division of Electronics and Informatics, Gunma University, Kiryu, Japan"],"affiliations":[{"raw_affiliation_string":"Division of Electronics and Informatics, Gunma University, Kiryu, Japan","institution_ids":["https://openalex.org/I258063972","https://openalex.org/I165735259"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073878162","display_name":"Richen Jiang","orcid":null},"institutions":[{"id":"https://openalex.org/I258063972","display_name":"Kiryu University","ror":"https://ror.org/02snehe53","country_code":"JP","type":"education","lineage":["https://openalex.org/I258063972"]},{"id":"https://openalex.org/I165735259","display_name":"Gunma University","ror":"https://ror.org/046fm7598","country_code":"JP","type":"education","lineage":["https://openalex.org/I165735259"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Richen Jiang","raw_affiliation_strings":["Division of Electronics and Informatics, Gunma University, Kiryu, Japan"],"affiliations":[{"raw_affiliation_string":"Division of Electronics and Informatics, Gunma University, Kiryu, Japan","institution_ids":["https://openalex.org/I258063972","https://openalex.org/I165735259"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028683951","display_name":"Rino Takahashi","orcid":null},"institutions":[{"id":"https://openalex.org/I258063972","display_name":"Kiryu University","ror":"https://ror.org/02snehe53","country_code":"JP","type":"education","lineage":["https://openalex.org/I258063972"]},{"id":"https://openalex.org/I165735259","display_name":"Gunma University","ror":"https://ror.org/046fm7598","country_code":"JP","type":"education","lineage":["https://openalex.org/I165735259"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Rino Takahashi","raw_affiliation_strings":["Division of Electronics and Informatics, Gunma University, Kiryu, Japan"],"affiliations":[{"raw_affiliation_string":"Division of Electronics and Informatics, Gunma University, Kiryu, Japan","institution_ids":["https://openalex.org/I258063972","https://openalex.org/I165735259"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101691738","display_name":"Haruo Kobayashi","orcid":"https://orcid.org/0000-0002-0990-5522"},"institutions":[{"id":"https://openalex.org/I165735259","display_name":"Gunma University","ror":"https://ror.org/046fm7598","country_code":"JP","type":"education","lineage":["https://openalex.org/I165735259"]},{"id":"https://openalex.org/I258063972","display_name":"Kiryu University","ror":"https://ror.org/02snehe53","country_code":"JP","type":"education","lineage":["https://openalex.org/I258063972"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Haruo Kobayashi","raw_affiliation_strings":["Division of Electronics and Informatics, Gunma University, Kiryu, Japan"],"affiliations":[{"raw_affiliation_string":"Division of Electronics and Informatics, Gunma University, Kiryu, Japan","institution_ids":["https://openalex.org/I258063972","https://openalex.org/I165735259"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048355781","display_name":"Ryoji Shiota","orcid":null},"institutions":[{"id":"https://openalex.org/I2800638042","display_name":"Socionext (Japan)","ror":"https://ror.org/04ma89d43","country_code":"JP","type":"company","lineage":["https://openalex.org/I2800638042"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Ryoji Shiota","raw_affiliation_strings":["Socionext Inc., Yokohama, Kanagawa, Japan"],"affiliations":[{"raw_affiliation_string":"Socionext Inc., Yokohama, Kanagawa, Japan","institution_ids":["https://openalex.org/I2800638042"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5112342449"],"corresponding_institution_ids":["https://openalex.org/I165735259","https://openalex.org/I258063972"],"apc_list":null,"apc_paid":null,"fwci":0.8601,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.76744293,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"462","last_page":"467"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.767528772354126},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7423242926597595},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5370368957519531},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.5354509353637695},{"id":"https://openalex.org/keywords/vernier-scale","display_name":"Vernier scale","score":0.5268125534057617},{"id":"https://openalex.org/keywords/flash","display_name":"Flash (photography)","score":0.5183590054512024},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.48731574416160583},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.2067975103855133},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1261197030544281},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.0966997742652893},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08619999885559082},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07758340239524841}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.767528772354126},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7423242926597595},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5370368957519531},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.5354509353637695},{"id":"https://openalex.org/C69710193","wikidata":"https://www.wikidata.org/wiki/Q14946576","display_name":"Vernier scale","level":2,"score":0.5268125534057617},{"id":"https://openalex.org/C2777526259","wikidata":"https://www.wikidata.org/wiki/Q221836","display_name":"Flash (photography)","level":2,"score":0.5183590054512024},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.48731574416160583},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.2067975103855133},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1261197030544281},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0966997742652893},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08619999885559082},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07758340239524841},{"id":"https://openalex.org/C58640448","wikidata":"https://www.wikidata.org/wiki/Q42515","display_name":"Cartography","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ispacs.2017.8266523","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispacs.2017.8266523","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1989627944","https://openalex.org/W2016832801","https://openalex.org/W2027273341","https://openalex.org/W2116742609","https://openalex.org/W2420266859","https://openalex.org/W2476994033","https://openalex.org/W2783650355"],"related_works":["https://openalex.org/W3158414702","https://openalex.org/W4389545333","https://openalex.org/W2296652335","https://openalex.org/W2182982459","https://openalex.org/W2112856903","https://openalex.org/W2120912680","https://openalex.org/W2541226935","https://openalex.org/W3022509112","https://openalex.org/W2547517791","https://openalex.org/W2126265853"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,53],"successive":[4],"approximation":[5],"register":[6],"(SAR)":[7],"time-to-digital":[8],"converter":[9],"(TDC)":[10],"architecture":[11,62,123],"capable":[12],"of":[13,48,92],"measuring":[14],"the":[15,46,60,66,72,80,93,98,102,126],"timing":[16,33,82,128],"difference":[17],"between":[18],"two":[19],"single-shot":[20,81,99,127],"signals":[21],"with":[22],"full":[23,136],"digital":[24,112,137],"FPGA.":[25],"The":[26],"SAR":[27,61,67,94],"TDC":[28,56,68,95],"is":[29,63,115],"suitable":[30],"for":[31],"multi-channel":[32],"built-out":[34],"self-test":[35],"(BOST)":[36],"implementation":[37,114],"on":[38],"an":[39,121],"FPGA":[40,113,138],"chip.":[41],"In":[42],"order":[43],"to":[44,96,134],"reduce":[45],"number":[47],"buffers":[49],"and":[50,76],"DFFs":[51],"in":[52,90],"conventional":[54],"Flash":[55],"or":[57],"Vernier":[58],"TDC,":[59],"applied.":[64],"However,":[65],"can":[69],"measure":[70,79,97],"only":[71],"repetitive":[73],"clock":[74],"timing,":[75,100],"it":[77],"cannot":[78],"signal.":[83],"So":[84],"first":[85],"we":[86,118],"employ":[87],"trigger":[88,103],"circuits":[89,104,108],"front":[91],"but":[101],"include":[105],"some":[106],"analog":[107],"so":[109],"that":[110,124],"its":[111,135],"difficult.":[116],"Then":[117],"propose":[119],"here":[120],"SAR-TDC":[122],"enables":[125],"using":[129],"ring":[130],"oscillators,":[131],"which":[132],"leads":[133],"implementation.":[139]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}