{"id":"https://openalex.org/W2547824631","doi":"https://doi.org/10.1109/ispacs.2015.7432840","title":"Virtual prototyping of DSP systems using a PSV-S approach","display_name":"Virtual prototyping of DSP systems using a PSV-S approach","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W2547824631","doi":"https://doi.org/10.1109/ispacs.2015.7432840","mag":"2547824631"},"language":"en","primary_location":{"id":"doi:10.1109/ispacs.2015.7432840","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispacs.2015.7432840","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040119309","display_name":"Armein Z. R. Langi","orcid":"https://orcid.org/0000-0001-9516-1461"},"institutions":[{"id":"https://openalex.org/I134635517","display_name":"Bandung Institute of Technology","ror":"https://ror.org/00apj8t60","country_code":"ID","type":"education","lineage":["https://openalex.org/I134635517"]}],"countries":["ID"],"is_corresponding":true,"raw_author_name":"Armein Z. R. Langi","raw_affiliation_strings":["School of Electrical Engineering and Informatics, Bandung Institute of Technology, West Java, Indonesia"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Informatics, Bandung Institute of Technology, West Java, Indonesia","institution_ids":["https://openalex.org/I134635517"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5040119309"],"corresponding_institution_ids":["https://openalex.org/I134635517"],"apc_list":null,"apc_paid":null,"fwci":0.323,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.64521943,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"586","last_page":"590"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9768999814987183,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9768999814987183,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.9329000115394592,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13382","display_name":"Robotics and Automated Systems","score":0.9318000078201294,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.8875955939292908},{"id":"https://openalex.org/keywords/texas-instruments-davinci","display_name":"Texas Instruments DaVinci","score":0.6681469082832336},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6576517820358276},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6231974959373474},{"id":"https://openalex.org/keywords/virtual-prototyping","display_name":"Virtual prototyping","score":0.6079482436180115},{"id":"https://openalex.org/keywords/codec","display_name":"Codec","score":0.5161079168319702},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4947897791862488},{"id":"https://openalex.org/keywords/rapid-prototyping","display_name":"Rapid prototyping","score":0.4555172026157379},{"id":"https://openalex.org/keywords/software-prototyping","display_name":"Software prototyping","score":0.4412069618701935},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.41643020510673523},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.34501969814300537},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22471338510513306},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2204148769378662},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.125505268573761},{"id":"https://openalex.org/keywords/software-development","display_name":"Software development","score":0.12335345149040222},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.07823401689529419}],"concepts":[{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.8875955939292908},{"id":"https://openalex.org/C45549533","wikidata":"https://www.wikidata.org/wiki/Q7707766","display_name":"Texas Instruments DaVinci","level":4,"score":0.6681469082832336},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6576517820358276},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6231974959373474},{"id":"https://openalex.org/C2780991453","wikidata":"https://www.wikidata.org/wiki/Q3408177","display_name":"Virtual prototyping","level":2,"score":0.6079482436180115},{"id":"https://openalex.org/C161765866","wikidata":"https://www.wikidata.org/wiki/Q184748","display_name":"Codec","level":2,"score":0.5161079168319702},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4947897791862488},{"id":"https://openalex.org/C2780395129","wikidata":"https://www.wikidata.org/wiki/Q1128971","display_name":"Rapid prototyping","level":2,"score":0.4555172026157379},{"id":"https://openalex.org/C2776697782","wikidata":"https://www.wikidata.org/wiki/Q576460","display_name":"Software prototyping","level":4,"score":0.4412069618701935},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.41643020510673523},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.34501969814300537},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22471338510513306},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2204148769378662},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.125505268573761},{"id":"https://openalex.org/C529173508","wikidata":"https://www.wikidata.org/wiki/Q638608","display_name":"Software development","level":3,"score":0.12335345149040222},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.07823401689529419},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ispacs.2015.7432840","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispacs.2015.7432840","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5799999833106995,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1996387222","https://openalex.org/W2171252162","https://openalex.org/W2535730116"],"related_works":["https://openalex.org/W1996847729","https://openalex.org/W2390600871","https://openalex.org/W2059100687","https://openalex.org/W2086408809","https://openalex.org/W2379610108","https://openalex.org/W1963811688","https://openalex.org/W3015414207","https://openalex.org/W2376279167","https://openalex.org/W2144351752","https://openalex.org/W2130639977"],"abstract_inverted_index":{"Virtual":[0],"prototyping":[1,17,64],"is":[2],"natural":[3],"in":[4,49,54],"developing":[5],"DSP":[6,15,27,32,37,43,55,71],"systems":[7],"using":[8],"a":[9,25,30,41,50,65],"product-service-value":[10],"system":[11,56],"(PSV-S)":[12],"approach.":[13],"Our":[14],"virtual":[16],"approach":[18,47,53],"consists":[19],"of":[20,63],"four":[21],"development":[22],"phases:":[23],"(1)":[24],"generic":[26],"system,":[28,33,38],"(2)":[29],"functional":[31],"(3)":[34],"an":[35,46,61],"architectural":[36],"and":[39],"(4)":[40],"real-time":[42],"system.":[44],"Such":[45],"results":[48],"more":[51],"comprehensive":[52],"development.":[57],"The":[58],"paper":[59],"shows":[60],"example":[62],"voice":[66],"codec":[67],"on":[68],"single":[69],"chip":[70],"processor.":[72]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}