{"id":"https://openalex.org/W2547224292","doi":"https://doi.org/10.1109/ispacs.2015.7432774","title":"Development of interface and coordination for control module CNC PCB milling machine","display_name":"Development of interface and coordination for control module CNC PCB milling machine","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W2547224292","doi":"https://doi.org/10.1109/ispacs.2015.7432774","mag":"2547224292"},"language":"en","primary_location":{"id":"doi:10.1109/ispacs.2015.7432774","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispacs.2015.7432774","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044932379","display_name":"Ariana Tulus Purnomo","orcid":"https://orcid.org/0000-0003-2839-8172"},"institutions":[{"id":"https://openalex.org/I134635517","display_name":"Bandung Institute of Technology","ror":"https://ror.org/00apj8t60","country_code":"ID","type":"education","lineage":["https://openalex.org/I134635517"]}],"countries":["ID"],"is_corresponding":false,"raw_author_name":"Ariana Tulus Purnomo","raw_affiliation_strings":["Department of Electrical Engineering, Institut Teknologi Bandung, Bandung, Indonesia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Institut Teknologi Bandung, Bandung, Indonesia","institution_ids":["https://openalex.org/I134635517"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044434326","display_name":"Farkhad Ihsan Hariadi","orcid":null},"institutions":[{"id":"https://openalex.org/I134635517","display_name":"Bandung Institute of Technology","ror":"https://ror.org/00apj8t60","country_code":"ID","type":"education","lineage":["https://openalex.org/I134635517"]}],"countries":["ID"],"is_corresponding":false,"raw_author_name":"Farkhad Ihsan Hariadi","raw_affiliation_strings":["Department of Electrical Engineering, Institut Teknologi Bandung, Bandung, Indonesia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Institut Teknologi Bandung, Bandung, Indonesia","institution_ids":["https://openalex.org/I134635517"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009349286","display_name":"Arif Sasongko","orcid":"https://orcid.org/0000-0003-3286-8480"},"institutions":[{"id":"https://openalex.org/I134635517","display_name":"Bandung Institute of Technology","ror":"https://ror.org/00apj8t60","country_code":"ID","type":"education","lineage":["https://openalex.org/I134635517"]}],"countries":["ID"],"is_corresponding":false,"raw_author_name":"Arif Sasongko","raw_affiliation_strings":["Department of Electrical Engineering, Institut Teknologi Bandung, Bandung, Indonesia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Institut Teknologi Bandung, Bandung, Indonesia","institution_ids":["https://openalex.org/I134635517"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2008,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.63450795,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"2","issue":null,"first_page":"246","last_page":"251"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13344","display_name":"Industrial Automation and Control Systems","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10571","display_name":"Robotic Mechanisms and Dynamics","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.6945797204971313},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.6719712615013123},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5986199378967285},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5655239224433899},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5567573308944702},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5419247150421143},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5235618948936462},{"id":"https://openalex.org/keywords/graphical-user-interface","display_name":"Graphical user interface","score":0.46166521310806274},{"id":"https://openalex.org/keywords/microsoft-visual-studio","display_name":"Microsoft Visual Studio","score":0.4532736837863922},{"id":"https://openalex.org/keywords/user-interface","display_name":"User interface","score":0.4256511628627777},{"id":"https://openalex.org/keywords/stepper","display_name":"Stepper","score":0.41712772846221924},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.2893289625644684},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2788016200065613}],"concepts":[{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.6945797204971313},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.6719712615013123},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5986199378967285},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5655239224433899},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5567573308944702},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5419247150421143},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5235618948936462},{"id":"https://openalex.org/C37789001","wikidata":"https://www.wikidata.org/wiki/Q782543","display_name":"Graphical user interface","level":2,"score":0.46166521310806274},{"id":"https://openalex.org/C512115632","wikidata":"https://www.wikidata.org/wiki/Q134067","display_name":"Microsoft Visual Studio","level":3,"score":0.4532736837863922},{"id":"https://openalex.org/C89505385","wikidata":"https://www.wikidata.org/wiki/Q47146","display_name":"User interface","level":2,"score":0.4256511628627777},{"id":"https://openalex.org/C187504802","wikidata":"https://www.wikidata.org/wiki/Q1751548","display_name":"Stepper","level":2,"score":0.41712772846221924},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.2893289625644684},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2788016200065613},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ispacs.2015.7432774","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispacs.2015.7432774","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320329091","display_name":"Institut Teknologi Bandung","ror":"https://ror.org/00apj8t60"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1978176922","https://openalex.org/W1989506895","https://openalex.org/W2041273742","https://openalex.org/W2083741618","https://openalex.org/W2312251062","https://openalex.org/W6698940723"],"related_works":["https://openalex.org/W3180179400","https://openalex.org/W2118366689","https://openalex.org/W2154998455","https://openalex.org/W2116888309","https://openalex.org/W2039055059","https://openalex.org/W2281900275","https://openalex.org/W2268684599","https://openalex.org/W2477652530","https://openalex.org/W3131369850","https://openalex.org/W2381088774"],"abstract_inverted_index":{"Control":[0],"module":[1,25],"CNC":[2,169],"PCB":[3,50,102,111,170],"milling":[4,103,112,171],"machine":[5],"consist":[6],"of":[7,37,119],"three":[8],"sub-modules,":[9],"first":[10],"sub-module":[11,16,38,156],"interfaces":[12,39],"and":[13,21,35,40,44,55,98,114,124,139,158],"coordination,":[14],"second":[15],"speed":[17],"control":[18,27],"spindle":[19,96],"motor":[20,97,120],"the":[22,63,117,153],"last":[23],"sub":[24],"position":[26],"stepper":[28,99],"motor.":[29],"This":[30],"paper":[31],"focuses":[32],"on":[33,128,141],"implementation":[34],"testing":[36],"coordination":[41,125,159],"that":[42,76,89],"receive":[43],"process":[45,113],"1":[46],"to":[47,81,94,167],"4":[48],"different":[49],"design":[51],"input":[52,64],"from":[53,79],"user":[54],"coordinate":[56],"others":[57],"two":[58],"sub-modules.":[59],"Gerber":[60],"file":[61],"as":[62],"converted":[65],"into":[66,74],"G-code":[67],"which":[68,163],"is":[69,126],"translate":[70],"by":[71,91],"interpreter":[72],"data":[73,88],"signal":[75,162],"ready":[77],"sent":[78],"PC":[80,129],"FPGA":[82,92,142],"via":[83,130,144],"serial":[84],"communication":[85],"RS232.":[86],"Then,":[87],"received":[90],"used":[93],"integrate":[95,168],"motors":[100],"in":[101],"process.":[104],"In":[105],"addition,":[106],"this":[107,155],"submodule":[108],"can":[109],"monitor":[110,116],"also":[115],"current":[118],"spindle.":[121],"Sub-module":[122],"interface":[123,157],"implemented":[127,140],"Visual":[131,135],"Studio":[132],"2013":[133],"using":[134,148],"Basic.NET":[136],"programming":[137],"language":[138],"DE2-70":[143],"Quartus":[145],"II":[146],"9.0":[147],"Verilog":[149],"HDL":[150],"language.":[151],"As":[152],"result,":[154],"generate":[160],"command":[161],"has":[164],"been":[165],"interpreted":[166],"machine.":[172]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
