{"id":"https://openalex.org/W2115350477","doi":"https://doi.org/10.1109/ispacs.2012.6473507","title":"A wide-range all-digital delay-locked loop using fast-lock variable SAR algorithm","display_name":"A wide-range all-digital delay-locked loop using fast-lock variable SAR algorithm","publication_year":2012,"publication_date":"2012-11-01","ids":{"openalex":"https://openalex.org/W2115350477","doi":"https://doi.org/10.1109/ispacs.2012.6473507","mag":"2115350477"},"language":"en","primary_location":{"id":"doi:10.1109/ispacs.2012.6473507","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispacs.2012.6473507","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 International Symposium on Intelligent Signal Processing and Communications Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100726716","display_name":"Wei\u2010Cheng Chen","orcid":"https://orcid.org/0000-0001-9680-7500"},"institutions":[{"id":"https://openalex.org/I154864474","display_name":"National Taiwan University of Science and Technology","ror":"https://ror.org/00q09pe49","country_code":"TW","type":"education","lineage":["https://openalex.org/I154864474"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wei-Cheng Chen","raw_affiliation_strings":["Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei 10607, Taiwan, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","institution_ids":["https://openalex.org/I154864474"]},{"raw_affiliation_string":"Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei 10607, Taiwan, R.O.C","institution_ids":["https://openalex.org/I154864474"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110211948","display_name":"Rong-Jyi Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I154864474","display_name":"National Taiwan University of Science and Technology","ror":"https://ror.org/00q09pe49","country_code":"TW","type":"education","lineage":["https://openalex.org/I154864474"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Rong-Jyi Yang","raw_affiliation_strings":["Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei 10607, Taiwan, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","institution_ids":["https://openalex.org/I154864474"]},{"raw_affiliation_string":"Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei 10607, Taiwan, R.O.C","institution_ids":["https://openalex.org/I154864474"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101721828","display_name":"Chia-Yu Yao","orcid":"https://orcid.org/0000-0001-9771-041X"},"institutions":[{"id":"https://openalex.org/I154864474","display_name":"National Taiwan University of Science and Technology","ror":"https://ror.org/00q09pe49","country_code":"TW","type":"education","lineage":["https://openalex.org/I154864474"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chia-Yu Yao","raw_affiliation_strings":["Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei 10607, Taiwan, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","institution_ids":["https://openalex.org/I154864474"]},{"raw_affiliation_string":"Department of Electric Engineering, National Taiwan University of Science and Technology, Taipei 10607, Taiwan, R.O.C","institution_ids":["https://openalex.org/I154864474"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077352050","display_name":"Chao-Chyun Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I99908691","display_name":"Yuan Ze University","ror":"https://ror.org/01fv1ds98","country_code":"TW","type":"education","lineage":["https://openalex.org/I99908691"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chao-Chyun Chen","raw_affiliation_strings":["Department of Electric Engineering, Yuan Ze University, Chung Li, Taiwan","Department of Electric Engineering, Yuan-Ze University, Chung-Li 32003, Taiwan, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electric Engineering, Yuan Ze University, Chung Li, Taiwan","institution_ids":["https://openalex.org/I99908691"]},{"raw_affiliation_string":"Department of Electric Engineering, Yuan-Ze University, Chung-Li 32003, Taiwan, R.O.C","institution_ids":["https://openalex.org/I99908691"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2369,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.78969957,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"338","last_page":"342"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.657672643661499},{"id":"https://openalex.org/keywords/lock","display_name":"Lock (firearm)","score":0.6493215560913086},{"id":"https://openalex.org/keywords/delay-locked-loop","display_name":"Delay-locked loop","score":0.6201726198196411},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5951683521270752},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5465412735939026},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5282743573188782},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.49971914291381836},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3204837441444397},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.157861590385437},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.1454867720603943},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12243595719337463}],"concepts":[{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.657672643661499},{"id":"https://openalex.org/C174839445","wikidata":"https://www.wikidata.org/wiki/Q1134386","display_name":"Lock (firearm)","level":2,"score":0.6493215560913086},{"id":"https://openalex.org/C190462668","wikidata":"https://www.wikidata.org/wiki/Q492265","display_name":"Delay-locked loop","level":4,"score":0.6201726198196411},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5951683521270752},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5465412735939026},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5282743573188782},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.49971914291381836},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3204837441444397},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.157861590385437},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.1454867720603943},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12243595719337463},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ispacs.2012.6473507","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ispacs.2012.6473507","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 International Symposium on Intelligent Signal Processing and Communications Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8799999952316284,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2002187871","https://openalex.org/W2009275112","https://openalex.org/W2019109746","https://openalex.org/W2111053525","https://openalex.org/W2124390946","https://openalex.org/W2126227985","https://openalex.org/W2133294020","https://openalex.org/W2141594064","https://openalex.org/W2143232235","https://openalex.org/W6655305116"],"related_works":["https://openalex.org/W2936029881","https://openalex.org/W2072077388","https://openalex.org/W2354050524","https://openalex.org/W2558486654","https://openalex.org/W2083878249","https://openalex.org/W2401743820","https://openalex.org/W3177439118","https://openalex.org/W4295813049","https://openalex.org/W2119216036","https://openalex.org/W2389594899"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,18],"wide-operating-range,":[4],"all":[5],"digital":[6],"delay-locked":[7],"loop":[8],"(ADDLL)":[9],"that":[10],"possesses":[11],"fast":[12],"and":[13,106],"anti-harmonic":[14],"lock":[15,91],"behavior":[16],"using":[17],"novel":[19],"fast-lock":[20],"variable":[21],"SAR":[22],"(FVSAR)":[23],"algorithm.":[24],"The":[25,57],"FVSAR":[26,46,87],"algorithm":[27],"provides":[28],"an":[29],"efficient":[30],"search":[31],"sequence":[32],"for":[33],"the":[34,38,42,52,67,71,81,85,90,98],"length-control":[35],"code":[36],"of":[37,70],"delay":[39],"line":[40],"in":[41,51],"ADDLL.":[43],"An":[44],"11-bit":[45],"ADDLL":[47,72,88],"prototype":[48],"was":[49],"fabricated":[50],"TSMC":[53],"0.18-\u03bcm":[54],"CMOS":[55],"process.":[56],"chip's":[58],"core":[59],"area":[60],"is":[61,74,102],"0.2":[62],"mm2.":[63],"With":[64],"1.6-V":[65],"supply,":[66],"power":[68],"consumption":[69],"chip":[73],"less":[75],"than":[76],"10":[77],"mW.":[78],"Compared":[79],"with":[80],"conventional":[82],"VSAR":[83],"algorithm,":[84],"proposed":[86],"reduces":[89],"time":[92],"by":[93],"at":[94],"least":[95],"35%":[96],"when":[97],"input":[99],"clock":[100],"frequency":[101],"between":[103],"66":[104],"MHz":[105],"550":[107],"MHz.":[108]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}