{"id":"https://openalex.org/W4404847898","doi":"https://doi.org/10.1109/isocc62682.2024.10762448","title":"Hybrid CC-LSTM Algorithm for SOC Estimation and Its Dual-Mode Hardware Design","display_name":"Hybrid CC-LSTM Algorithm for SOC Estimation and Its Dual-Mode Hardware Design","publication_year":2024,"publication_date":"2024-08-19","ids":{"openalex":"https://openalex.org/W4404847898","doi":"https://doi.org/10.1109/isocc62682.2024.10762448"},"language":"en","primary_location":{"id":"doi:10.1109/isocc62682.2024.10762448","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc62682.2024.10762448","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 21st International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024187443","display_name":"Y. Y. Peng","orcid":"https://orcid.org/0000-0002-2657-3590"},"institutions":[{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yiwen Peng","raw_affiliation_strings":["Shenzhen University,College of Electronics and Information Engineering,Shenzhen,China"],"affiliations":[{"raw_affiliation_string":"Shenzhen University,College of Electronics and Information Engineering,Shenzhen,China","institution_ids":["https://openalex.org/I180726961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102540273","display_name":"Gexuan Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Gexuan Wu","raw_affiliation_strings":["Shenzhen University,College of Electronics and Information Engineering,Shenzhen,China"],"affiliations":[{"raw_affiliation_string":"Shenzhen University,College of Electronics and Information Engineering,Shenzhen,China","institution_ids":["https://openalex.org/I180726961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101637243","display_name":"Lei Huang","orcid":"https://orcid.org/0000-0002-5896-4596"},"institutions":[{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lei Huang","raw_affiliation_strings":["Shenzhen University,College of Electronics and Information Engineering,Shenzhen,China"],"affiliations":[{"raw_affiliation_string":"Shenzhen University,College of Electronics and Information Engineering,Shenzhen,China","institution_ids":["https://openalex.org/I180726961"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024019289","display_name":"Bing Li","orcid":"https://orcid.org/0000-0003-1372-4166"},"institutions":[{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Bing Li","raw_affiliation_strings":["Shenzhen University,College of Electronics and Information Engineering,Shenzhen,China"],"affiliations":[{"raw_affiliation_string":"Shenzhen University,College of Electronics and Information Engineering,Shenzhen,China","institution_ids":["https://openalex.org/I180726961"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5024187443"],"corresponding_institution_ids":["https://openalex.org/I180726961"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.2585297,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"113","last_page":"114"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11749","display_name":"Iterative Learning Control Systems","score":0.8938999772071838,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11749","display_name":"Iterative Learning Control Systems","score":0.8938999772071838,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.8831999897956848,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.8532000184059143,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dual-mode","display_name":"Dual mode","score":0.7531570196151733},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.741576611995697},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.5250791907310486},{"id":"https://openalex.org/keywords/dual","display_name":"Dual (grammatical number)","score":0.521978497505188},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5180932879447937},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5005395412445068},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.35021519660949707},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.10322263836860657},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09235012531280518},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.06329852342605591}],"concepts":[{"id":"https://openalex.org/C3019325349","wikidata":"https://www.wikidata.org/wiki/Q3874753","display_name":"Dual mode","level":2,"score":0.7531570196151733},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.741576611995697},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.5250791907310486},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.521978497505188},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5180932879447937},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5005395412445068},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35021519660949707},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.10322263836860657},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09235012531280518},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.06329852342605591},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isocc62682.2024.10762448","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc62682.2024.10762448","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 21st International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5199999809265137,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2366623718","https://openalex.org/W2589366957","https://openalex.org/W3027324516","https://openalex.org/W3108398365","https://openalex.org/W3129523691","https://openalex.org/W3139000127"],"related_works":["https://openalex.org/W2317351040","https://openalex.org/W2952466936","https://openalex.org/W1988622314","https://openalex.org/W2393949104","https://openalex.org/W2392631856","https://openalex.org/W2355651228","https://openalex.org/W2330491326","https://openalex.org/W2768219827","https://openalex.org/W1992581387","https://openalex.org/W4254025658"],"abstract_inverted_index":{"Coulomb":[0],"counting":[1],"method":[2,92],"(CC)":[3],"and":[4,30],"Long":[5],"ShortTerm":[6],"Memory":[7],"(LSTM)":[8],"network":[9],"are":[10],"widely":[11],"used":[12,72,94],"for":[13,27,66,73],"battery":[14],"State":[15],"of":[16,105,117],"Charge":[17],"(SOC)":[18],"estimation.":[19,75],"This":[20],"paper":[21],"develops":[22],"a":[23,32,41,46],"hybrid":[24],"CC-LSTM":[25,61,81],"algorithm":[26],"SOC":[28,74],"estimation":[29],"designs":[31],"dual-mode":[33],"hardware":[34,79],"architecture":[35],"based":[36,44],"on":[37,45,107],"this":[38],"algorithm.":[39],"Additionally,":[40],"test":[42],"platform":[43],"field-programmable":[47],"gate":[48],"array":[49],"(FPGA)":[50],"is":[51,64,71,82,93],"built":[52],"to":[53],"validate":[54],"the":[55,59,77,88],"proposed":[56,60,78,99],"hardware.":[57],"In":[58,76],"model,":[62],"CC":[63],"employed":[65],"feature":[67],"extraction,":[68],"while":[69],"LSTM":[70],"design,":[80],"utilized":[83],"in":[84,95],"dynamic":[85],"mode,":[86],"whereas":[87],"open":[89],"circuit":[90],"voltage":[91],"sleep":[96],"mode.":[97],"The":[98],"design":[100],"achieves":[101],"an":[102,110],"execution":[103],"time":[104],"2.86ms":[106],"FPGA,":[108],"with":[109],"average":[111],"root":[112],"mean":[113],"square":[114],"error":[115],"(RMSE)":[116],"0.912%":[118],"under":[119],"various":[120],"operating":[121],"conditions.":[122]},"counts_by_year":[],"updated_date":"2025-12-21T01:58:51.020947","created_date":"2025-10-10T00:00:00"}