{"id":"https://openalex.org/W4391183393","doi":"https://doi.org/10.1109/isocc59558.2023.10396513","title":"Adaptive Tag Comparison for Hybrid Cache","display_name":"Adaptive Tag Comparison for Hybrid Cache","publication_year":2023,"publication_date":"2023-10-25","ids":{"openalex":"https://openalex.org/W4391183393","doi":"https://doi.org/10.1109/isocc59558.2023.10396513"},"language":"en","primary_location":{"id":"doi:10.1109/isocc59558.2023.10396513","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/isocc59558.2023.10396513","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 20th International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5093780584","display_name":"Seong Jae Eom","orcid":null},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seong Jae Eom","raw_affiliation_strings":["Yonsei University,Dept. of Electrical and Electronic Engineering,Seoul,Republic of Korea","Dept. of Electrical and Electronic Engineering, Yonsei University, Seoul, Republic of Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Yonsei University,Dept. of Electrical and Electronic Engineering,Seoul,Republic of Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Dept. of Electrical and Electronic Engineering, Yonsei University, Seoul, Republic of Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084016800","display_name":"Eui-Young Chung","orcid":"https://orcid.org/0000-0003-2013-8763"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Eui-Young Chung","raw_affiliation_strings":["Yonsei University,Dept. of Electrical and Electronic Engineering,Seoul,Republic of Korea","Dept. of Electrical and Electronic Engineering, Yonsei University, Seoul, Republic of Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Yonsei University,Dept. of Electrical and Electronic Engineering,Seoul,Republic of Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Dept. of Electrical and Electronic Engineering, Yonsei University, Seoul, Republic of Korea","institution_ids":["https://openalex.org/I193775966"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2883,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.54965779,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"83","last_page":"84"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.859554648399353},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8176263570785522},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6431772112846375},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.5729787349700928},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.5672154426574707},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.5582709908485413},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.5187882781028748},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5156549215316772},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.513789713382721},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.49164706468582153},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.48626410961151123},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4829096794128418},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.47679734230041504},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4433332681655884},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33405715227127075},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2622705399990082},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16106295585632324}],"concepts":[{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.859554648399353},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8176263570785522},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6431772112846375},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.5729787349700928},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.5672154426574707},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.5582709908485413},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.5187882781028748},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5156549215316772},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.513789713382721},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.49164706468582153},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.48626410961151123},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4829096794128418},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.47679734230041504},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4433332681655884},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33405715227127075},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2622705399990082},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16106295585632324},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isocc59558.2023.10396513","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/isocc59558.2023.10396513","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 20th International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1979527452","https://openalex.org/W2010202670","https://openalex.org/W2100948795","https://openalex.org/W2296735630","https://openalex.org/W2962947399"],"related_works":["https://openalex.org/W2133489088","https://openalex.org/W2118932116","https://openalex.org/W2114386333","https://openalex.org/W2535115842","https://openalex.org/W2396934146","https://openalex.org/W2363769136","https://openalex.org/W2126408955","https://openalex.org/W2006655698","https://openalex.org/W2148571123","https://openalex.org/W2897450889"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3],"proposal":[4],"for":[5,28,50,59],"an":[6,60,121,140,149],"STT-RAM":[7],"(Spin":[8],"Transfer":[9],"Torque":[10],"Magnetic":[11],"Random":[12,18],"Access":[13,19],"Memory)":[14,20],"and":[15,24,37,93],"SRAM":[16],"(Static":[17],"hybrid":[21,55,118,161],"cache":[22,42,48,56,119,162],"architecture":[23],"adaptive":[25,79,131],"tag":[26,75,80,113,132,155],"comparison":[27,81,156],"this":[29],"architecture,":[30,120],"considering":[31],"the":[32,38,54,67,71,86,90,94,100,117,160],"drawbacks":[33],"of":[34,41,73,96,125,142,146,152],"high-power":[35],"consumption":[36,136],"high":[39],"cost":[40],"size":[43,64],"expansion":[44],"in":[45,62,107,154],"conventional":[46],"SRAM-based":[47],"architectures":[49],"performance":[51],"enhancement.":[52],"Although":[53],"structure":[57],"allows":[58],"increase":[61],"memory":[63,91,101],"relative":[65],"to":[66,109,159],"area,":[68],"it":[69],"has":[70],"drawback":[72],"increased":[74],"comparison.":[76,114],"The":[77],"proposed":[78],"method":[82],"involves":[83],"dynamically":[84],"changing":[85],"flag":[87],"associated":[88],"with":[89],"state":[92,102],"value":[95],"threshold,":[97],"which":[98],"determines":[99],"based":[103],"on":[104],"access":[105],"count,":[106],"real-time":[108],"make":[110],"decisions":[111],"about":[112],"By":[115],"adopting":[116],"average":[122,141,150],"power":[123,135],"reduction":[124,151],"51.01%":[126],"is":[127,137],"achieved.":[128],"And":[129],"applying":[130],"comparison,":[133],"further":[134],"reduced":[138],"by":[139],"34.12%":[143],"without":[144],"degradation":[145],"performance,":[147],"through":[148],"53.14%":[153],"overhead":[157],"compared":[158],"scheme.":[163]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}