{"id":"https://openalex.org/W4391183476","doi":"https://doi.org/10.1109/isocc59558.2023.10396246","title":"Multi-Phase Frequency Divider Generator with Process-Independent Automation","display_name":"Multi-Phase Frequency Divider Generator with Process-Independent Automation","publication_year":2023,"publication_date":"2023-10-25","ids":{"openalex":"https://openalex.org/W4391183476","doi":"https://doi.org/10.1109/isocc59558.2023.10396246"},"language":"en","primary_location":{"id":"doi:10.1109/isocc59558.2023.10396246","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/isocc59558.2023.10396246","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 20th International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082571460","display_name":"Jihoon Jang","orcid":"https://orcid.org/0000-0001-5272-2441"},"institutions":[{"id":"https://openalex.org/I4575257","display_name":"Hanyang University","ror":"https://ror.org/046865y68","country_code":"KR","type":"education","lineage":["https://openalex.org/I4575257"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jihoon Jang","raw_affiliation_strings":["Hanyang University,Dept. of Electronic Engineering,Seoul,Korea","Dept. of Electronic Engineering, Hanyang University, Seoul, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Hanyang University,Dept. of Electronic Engineering,Seoul,Korea","institution_ids":["https://openalex.org/I4575257"]},{"raw_affiliation_string":"Dept. of Electronic Engineering, Hanyang University, Seoul, Korea","institution_ids":["https://openalex.org/I4575257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113103841","display_name":"Heedo Jeong","orcid":null},"institutions":[{"id":"https://openalex.org/I4575257","display_name":"Hanyang University","ror":"https://ror.org/046865y68","country_code":"KR","type":"education","lineage":["https://openalex.org/I4575257"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Heedo Jeong","raw_affiliation_strings":["Hanyang University,Dept. of Electronic Engineering,Seoul,Korea","Dept. of Electronic Engineering, Hanyang University, Seoul, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Hanyang University,Dept. of Electronic Engineering,Seoul,Korea","institution_ids":["https://openalex.org/I4575257"]},{"raw_affiliation_string":"Dept. of Electronic Engineering, Hanyang University, Seoul, Korea","institution_ids":["https://openalex.org/I4575257"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056788062","display_name":"Jaeduk Han","orcid":"https://orcid.org/0000-0002-2292-7670"},"institutions":[{"id":"https://openalex.org/I4575257","display_name":"Hanyang University","ror":"https://ror.org/046865y68","country_code":"KR","type":"education","lineage":["https://openalex.org/I4575257"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jaeduk Han","raw_affiliation_strings":["Hanyang University,Dept. of Electronic Engineering,Seoul,Korea","Dept. of Electronic Engineering, Hanyang University, Seoul, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Hanyang University,Dept. of Electronic Engineering,Seoul,Korea","institution_ids":["https://openalex.org/I4575257"]},{"raw_affiliation_string":"Dept. of Electronic Engineering, Hanyang University, Seoul, Korea","institution_ids":["https://openalex.org/I4575257"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4575257"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.30981019,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"129","last_page":"130"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9919000267982483,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/frequency-divider","display_name":"Frequency divider","score":0.6845564842224121},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5706736445426941},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.5659374594688416},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.559746503829956},{"id":"https://openalex.org/keywords/signal-generator","display_name":"Signal generator","score":0.5453353524208069},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4975786507129669},{"id":"https://openalex.org/keywords/phase","display_name":"Phase (matter)","score":0.46485933661460876},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3754980266094208},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.20799869298934937},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19665423035621643},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14697125554084778},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.13765758275985718},{"id":"https://openalex.org/keywords/power-dividers-and-directional-couplers","display_name":"Power dividers and directional couplers","score":0.136315256357193},{"id":"https://openalex.org/keywords/mechanical-engineering","display_name":"Mechanical engineering","score":0.1056700348854065},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.06840512156486511},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.06724858283996582}],"concepts":[{"id":"https://openalex.org/C74982907","wikidata":"https://www.wikidata.org/wiki/Q1455624","display_name":"Frequency divider","level":3,"score":0.6845564842224121},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5706736445426941},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.5659374594688416},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.559746503829956},{"id":"https://openalex.org/C207912722","wikidata":"https://www.wikidata.org/wiki/Q1259123","display_name":"Signal generator","level":3,"score":0.5453353524208069},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4975786507129669},{"id":"https://openalex.org/C44280652","wikidata":"https://www.wikidata.org/wiki/Q104837","display_name":"Phase (matter)","level":2,"score":0.46485933661460876},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3754980266094208},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.20799869298934937},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19665423035621643},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14697125554084778},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.13765758275985718},{"id":"https://openalex.org/C202988678","wikidata":"https://www.wikidata.org/wiki/Q1417986","display_name":"Power dividers and directional couplers","level":2,"score":0.136315256357193},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.1056700348854065},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.06840512156486511},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.06724858283996582},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isocc59558.2023.10396246","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/isocc59558.2023.10396246","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 20th International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6100000143051147,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322202","display_name":"IC Design Education Center","ror":"https://ror.org/005v57z85"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W4236728296","https://openalex.org/W4384162028"],"related_works":["https://openalex.org/W2369838978","https://openalex.org/W2108529481","https://openalex.org/W2360200482","https://openalex.org/W1510114566","https://openalex.org/W2363092956","https://openalex.org/W3027303490","https://openalex.org/W2355062162","https://openalex.org/W2390668907","https://openalex.org/W2391869486","https://openalex.org/W1974656731"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"an":[3],"automatic":[4],"circuit":[5],"generator":[6,15,54],"for":[7],"multi-phase":[8],"frequency":[9],"dividers.":[10],"The":[11,52],"schematic":[12],"and":[13,32,50,68],"layout":[14],"scripts":[16],"are":[17],"parameterized,":[18],"allowing":[19],"users":[20],"to":[21],"customize":[22],"the":[23,28,33,36],"number":[24,29],"of":[25,30,35,47],"output":[26],"phases,":[27],"fingers,":[31],"arrangement":[34],"physical":[37,63],"layout.":[38],"It":[39],"increases":[40],"design":[41],"flexibility,":[42],"satisfying":[43],"a":[44],"wide":[45],"range":[46],"user":[48],"requirements":[49],"specifications.":[51],"proposed":[53],"has":[55],"been":[56],"successfully":[57],"validated":[58],"by":[59],"generating":[60],"DRC-and-LVS":[61],"clean":[62],"layouts":[64],"in":[65],"both":[66],"40-nm":[67],"28-nm":[69],"CMOS":[70],"processes.":[71]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}