{"id":"https://openalex.org/W4319430834","doi":"https://doi.org/10.1109/isocc56007.2022.10031346","title":"A 8-bit 300MHz Domino Based Successive Approximation Register ADC","display_name":"A 8-bit 300MHz Domino Based Successive Approximation Register ADC","publication_year":2022,"publication_date":"2022-10-19","ids":{"openalex":"https://openalex.org/W4319430834","doi":"https://doi.org/10.1109/isocc56007.2022.10031346"},"language":"en","primary_location":{"id":"doi:10.1109/isocc56007.2022.10031346","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/isocc56007.2022.10031346","pdf_url":null,"source":{"id":"https://openalex.org/S4363608048","display_name":"2022 19th International SoC Design Conference (ISOCC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 19th International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5114228395","display_name":"Ko\u2010Chi Kuo","orcid":null},"institutions":[{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ko-Chi Kuo","raw_affiliation_strings":["National Sun Yat-sen University,Dept. of Computer Science and Engineering,Kaohsiung,Taiwan","Dept. of Computer Science and Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Sun Yat-sen University,Dept. of Computer Science and Engineering,Kaohsiung,Taiwan","institution_ids":["https://openalex.org/I142974352"]},{"raw_affiliation_string":"Dept. of Computer Science and Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087048767","display_name":"Hsiung-Yu Chi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210107330","display_name":"Powertech Technology (Taiwan)","ror":"https://ror.org/01c7pa495","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210107330"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hsiung-Yu Chi","raw_affiliation_strings":["Sunplus Technology Co., Ltd,Hsinchu,Taiwan","Sunplus Technology Co., Ltd, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Sunplus Technology Co., Ltd,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210107330"]},{"raw_affiliation_string":"Sunplus Technology Co., Ltd, Hsinchu, Taiwan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"47","last_page":"48"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.9020974636077881},{"id":"https://openalex.org/keywords/domino","display_name":"Domino","score":0.7281831502914429},{"id":"https://openalex.org/keywords/domino-logic","display_name":"Domino logic","score":0.701089084148407},{"id":"https://openalex.org/keywords/reset","display_name":"Reset (finance)","score":0.6910237073898315},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.6718378067016602},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6626131534576416},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6086601614952087},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5544462203979492},{"id":"https://openalex.org/keywords/domino-effect","display_name":"Domino effect","score":0.49178674817085266},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4158332943916321},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.41158056259155273},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3552590012550354},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3279995322227478},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.28710898756980896},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2314247190952301},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.13438937067985535},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07897710800170898}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.9020974636077881},{"id":"https://openalex.org/C2776416436","wikidata":"https://www.wikidata.org/wiki/Q3751781","display_name":"Domino","level":3,"score":0.7281831502914429},{"id":"https://openalex.org/C2777555262","wikidata":"https://www.wikidata.org/wiki/Q173391","display_name":"Domino logic","level":5,"score":0.701089084148407},{"id":"https://openalex.org/C2779795794","wikidata":"https://www.wikidata.org/wiki/Q7315343","display_name":"Reset (finance)","level":2,"score":0.6910237073898315},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.6718378067016602},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6626131534576416},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6086601614952087},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5544462203979492},{"id":"https://openalex.org/C155223936","wikidata":"https://www.wikidata.org/wiki/Q682875","display_name":"Domino effect","level":2,"score":0.49178674817085266},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4158332943916321},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.41158056259155273},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3552590012550354},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3279995322227478},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.28710898756980896},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2314247190952301},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.13438937067985535},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07897710800170898},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C185544564","wikidata":"https://www.wikidata.org/wiki/Q81197","display_name":"Nuclear physics","level":1,"score":0.0},{"id":"https://openalex.org/C106159729","wikidata":"https://www.wikidata.org/wiki/Q2294553","display_name":"Financial economics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C161790260","wikidata":"https://www.wikidata.org/wiki/Q82264","display_name":"Catalysis","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isocc56007.2022.10031346","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/isocc56007.2022.10031346","pdf_url":null,"source":{"id":"https://openalex.org/S4363608048","display_name":"2022 19th International SoC Design Conference (ISOCC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 19th International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8299999833106995,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2008952700","https://openalex.org/W2145725267","https://openalex.org/W2343222450","https://openalex.org/W2793943770","https://openalex.org/W2801227755","https://openalex.org/W4247114301"],"related_works":["https://openalex.org/W3180090903","https://openalex.org/W4387844122","https://openalex.org/W2383431396","https://openalex.org/W2984306696","https://openalex.org/W2745797843","https://openalex.org/W3209158787","https://openalex.org/W4320006734","https://openalex.org/W4361865958","https://openalex.org/W4254482168","https://openalex.org/W2131531464"],"abstract_inverted_index":{"A":[0],"8-bit":[1],"domino":[2],"based":[3],"SAR":[4],"ADC":[5],"is":[6,39,93],"proposed.":[7],"It":[8,48],"utilizes":[9],"the":[10,16,21,25,29,33,36,53,63,77],"loop-unrolled":[11],"conversion":[12,18],"technique":[13],"to":[14],"accomplish":[15],"analog-to-digital":[17],"by":[19,57],"reducing":[20],"reset":[22],"time":[23],"of":[24,32,55,79],"comparators.":[26],"To":[27],"enhance":[28],"operation":[30,66],"speed":[31,61],"proposed":[34,69],"design,":[35],"first":[37],"comparison":[38],"performed":[40],"without":[41],"switching":[42],"any":[43],"logic":[44],"switches":[45],"after":[46],"sampling.":[47],"can":[49],"not":[50],"only":[51],"reduce":[52],"use":[54],"capacitors":[56],"half,":[58],"but":[59],"also":[60],"up":[62],"overall":[64],"circuit":[65],"speed.":[67],"The":[68,81,91],"design":[70],"implements":[71],"in":[72],"TSMC":[73],"90nm":[74],"technology":[75],"with":[76],"supply":[78],"1.2V.":[80],"simulated":[82],"INL":[83],"and":[84,88],"DNL":[85],"are":[86],"0.545/-0.029":[87],"0.244/-0.254,":[89],"respectively.":[90],"SNDR":[92],"48.3":[94],"dB.":[95]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}