{"id":"https://openalex.org/W3128374479","doi":"https://doi.org/10.1109/isocc50952.2020.9333096","title":"A Bit-Line Boosting Technique for Fast Bit-Line Computation without Read Disturbance","display_name":"A Bit-Line Boosting Technique for Fast Bit-Line Computation without Read Disturbance","publication_year":2020,"publication_date":"2020-10-21","ids":{"openalex":"https://openalex.org/W3128374479","doi":"https://doi.org/10.1109/isocc50952.2020.9333096","mag":"3128374479"},"language":"en","primary_location":{"id":"doi:10.1109/isocc50952.2020.9333096","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc50952.2020.9333096","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010444793","display_name":"Sungsoo Cheon","orcid":"https://orcid.org/0000-0002-3924-1886"},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungsoo Cheon","raw_affiliation_strings":["School of Electrical Engineering, Korea University, Seoul, Republic of Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Korea University, Seoul, Republic of Korea","institution_ids":["https://openalex.org/I197347611"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101839916","display_name":"Jongsun Park","orcid":"https://orcid.org/0000-0003-3251-0024"},"institutions":[{"id":"https://openalex.org/I197347611","display_name":"Korea University","ror":"https://ror.org/047dqcg40","country_code":"KR","type":"education","lineage":["https://openalex.org/I197347611"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jongsun Park","raw_affiliation_strings":["School of Electrical Engineering, Korea University, Seoul, Republic of Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Korea University, Seoul, Republic of Korea","institution_ids":["https://openalex.org/I197347611"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I197347611"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"294","last_page":"295"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7241688370704651},{"id":"https://openalex.org/keywords/boosting","display_name":"Boosting (machine learning)","score":0.7095322012901306},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.585145115852356},{"id":"https://openalex.org/keywords/von-neumann-architecture","display_name":"Von Neumann architecture","score":0.5653893947601318},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5452086329460144},{"id":"https://openalex.org/keywords/line","display_name":"Line (geometry)","score":0.48040130734443665},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4780890643596649},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.46630942821502686},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.46380260586738586},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4399489462375641},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4386691749095917},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4005100727081299},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.23086372017860413},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1938703954219818},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1469327211380005},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12934449315071106},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07568323612213135}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7241688370704651},{"id":"https://openalex.org/C46686674","wikidata":"https://www.wikidata.org/wiki/Q466303","display_name":"Boosting (machine learning)","level":2,"score":0.7095322012901306},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.585145115852356},{"id":"https://openalex.org/C80469333","wikidata":"https://www.wikidata.org/wiki/Q189088","display_name":"Von Neumann architecture","level":2,"score":0.5653893947601318},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5452086329460144},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.48040130734443665},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4780890643596649},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.46630942821502686},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.46380260586738586},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4399489462375641},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4386691749095917},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4005100727081299},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.23086372017860413},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1938703954219818},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1469327211380005},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12934449315071106},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07568323612213135},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isocc50952.2020.9333096","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc50952.2020.9333096","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2331783522","https://openalex.org/W2554194110","https://openalex.org/W2801000640","https://openalex.org/W2976137532","https://openalex.org/W6768601593"],"related_works":["https://openalex.org/W2125652721","https://openalex.org/W1540371141","https://openalex.org/W4231274751","https://openalex.org/W2154063878","https://openalex.org/W2556012038","https://openalex.org/W2333896121","https://openalex.org/W3151633427","https://openalex.org/W2583763619","https://openalex.org/W2145073242","https://openalex.org/W2012045996"],"abstract_inverted_index":{"SRAM-based":[0],"In-Memory":[1],"Computing":[2],"(IMC)":[3],"is":[4,50,82],"one":[5],"of":[6,16,35,63,100],"the":[7,13,36,56,61,64,109,124],"most":[8,34,121],"promising":[9],"technique":[10,43,71,111],"to":[11,106,118,123],"overcome":[12,31],"innate":[14],"problems":[15],"von-Neumann":[17],"architecture.":[18,65,126],"However,":[19,52],"simultaneously":[20],"accessing":[21],"multiple":[22],"data":[23],"results":[24],"in":[25,44],"inevitable":[26],"read":[27],"disturbance":[28],"issue.":[29],"To":[30],"this":[32,67],"drawback,":[33],"previous":[37],"works":[38],"employ":[39],"Word-Line":[40,46],"Under-Drive":[41],"(WLUD)":[42],"which":[45,72],"(WL)":[47],"driver":[48],"voltage":[49],"lowered.":[51],"WLUD":[53],"necessarily":[54],"weakens":[55],"access":[57],"transistors,":[58],"consequently":[59],"impairing":[60],"performance":[62],"In":[66],"article,":[68],"new":[69],"design":[70],"involves":[73],"short":[74],"WL":[75],"pulse":[76],"and":[77],"Bit-Line":[78],"(BL)":[79],"boosting":[80],"scheme":[81],"introduced.":[83],"The":[84],"proposed":[85,110],"architecture":[86],"does":[87],"not":[88],"require":[89],"much":[90],"area":[91],"overhead":[92],"since":[93],"it":[94],"only":[95,101],"needs":[96],"a":[97],"circuit":[98],"consisting":[99],"4":[102],"transistors":[103],"parallelly":[104],"added":[105],"BL.":[107],"With":[108],"applied,":[112],"BL":[113],"discharge":[114],"time":[115],"was":[116],"shortened":[117],"16.4%":[119],"at":[120],"compared":[122],"conventional":[125]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
