{"id":"https://openalex.org/W3128052129","doi":"https://doi.org/10.1109/isocc50952.2020.9332992","title":"Design of Current-Mode 8T SRAM Compute-In-Memory Macro for Processing Neural Networks","display_name":"Design of Current-Mode 8T SRAM Compute-In-Memory Macro for Processing Neural Networks","publication_year":2020,"publication_date":"2020-10-21","ids":{"openalex":"https://openalex.org/W3128052129","doi":"https://doi.org/10.1109/isocc50952.2020.9332992","mag":"3128052129"},"language":"en","primary_location":{"id":"doi:10.1109/isocc50952.2020.9332992","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc50952.2020.9332992","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056917810","display_name":"Taegeun Yoo","orcid":"https://orcid.org/0000-0001-9876-7725"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Taegeun Yoo","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076628109","display_name":"Tony Tae-Hyoung Kim","orcid":"https://orcid.org/0000-0002-1779-1799"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Tony Tae-Hyoung Kim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035469250","display_name":"Bongjin Kim","orcid":"https://orcid.org/0000-0001-5397-9628"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Bongjin Kim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003541204","display_name":"Chengshuo Yu","orcid":"https://orcid.org/0000-0003-0897-7871"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Chengshuo Yu","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069583051","display_name":"Kevin Chai Tshun Chuan","orcid":null},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Kevin Chai Tshun Chuan","raw_affiliation_strings":["Institute of Microelectronics, Agency for Science, Technology and Research, Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Agency for Science, Technology and Research, Singapore","institution_ids":["https://openalex.org/I115228651","https://openalex.org/I4210090209"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.15912126,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"175","last_page":"176"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.839775025844574},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6746071577072144},{"id":"https://openalex.org/keywords/column","display_name":"Column (typography)","score":0.6639987826347351},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6573610305786133},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.6450971961021423},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5170058012008667},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.43535569310188293},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4335731863975525},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4127081334590912},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3903294503688812},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3738939166069031},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.32142800092697144},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1787046492099762},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1425291895866394}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.839775025844574},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6746071577072144},{"id":"https://openalex.org/C2780551164","wikidata":"https://www.wikidata.org/wiki/Q2306599","display_name":"Column (typography)","level":3,"score":0.6639987826347351},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6573610305786133},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.6450971961021423},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5170058012008667},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.43535569310188293},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4335731863975525},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4127081334590912},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3903294503688812},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3738939166069031},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.32142800092697144},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1787046492099762},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1425291895866394},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isocc50952.2020.9332992","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc50952.2020.9332992","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2527492855","https://openalex.org/W2792893539","https://openalex.org/W2898665561","https://openalex.org/W2898913080","https://openalex.org/W2971738511","https://openalex.org/W3015887053","https://openalex.org/W3017968097","https://openalex.org/W6727867346","https://openalex.org/W6775473022"],"related_works":["https://openalex.org/W2089002058","https://openalex.org/W1909296377","https://openalex.org/W3185029353","https://openalex.org/W2969498307","https://openalex.org/W3116379964","https://openalex.org/W2915176329","https://openalex.org/W2793465010","https://openalex.org/W2208608937","https://openalex.org/W2120018824","https://openalex.org/W2766443086"],"abstract_inverted_index":{"A":[0,13,62],"novel":[1],"8T":[2],"SRAM":[3,29],"bitcell":[4],"is":[5,56,64,74],"proposed":[6],"for":[7],"computing":[8],"dot-products":[9],"using":[10,66],"current-mode":[11],"accumulation.":[12],"write":[14],"disturb":[15],"issue":[16,46],"has":[17],"been":[18],"eliminated":[19],"by":[20],"adding":[21],"two":[22],"extra":[23],"transistors":[24],"into":[25],"a":[26,34],"standard":[27],"6T":[28],"bitcell.":[30],"Besides,":[31],"we":[32],"embed":[33],"column":[35],"ADC":[36,44,55],"in":[37],"each":[38],"column-based":[39],"neuron":[40],"to":[41,60],"address":[42],"the":[43,69],"overhead":[45],"of":[47,54,71],"conventional":[48],"analog":[49],"compute-in-memory":[50],"macros.":[51],"The":[52],"resolution":[53],"reconfigurable":[57],"from":[58],"1":[59],"5bit.":[61],"test-chip":[63],"fabricated":[65],"65nm,":[67],"and":[68],"energy-efficiency":[70],"bitwise":[72],"operation":[73],"490-to-15.8TOPS/W":[75],"at":[76],"1-5bit.":[77]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}