{"id":"https://openalex.org/W3126705999","doi":"https://doi.org/10.1109/isocc50952.2020.9332940","title":"A Novel Scheme to Map Convolutional Networks to Network-on-Chip with Computing-In-Memory Nodes","display_name":"A Novel Scheme to Map Convolutional Networks to Network-on-Chip with Computing-In-Memory Nodes","publication_year":2020,"publication_date":"2020-10-21","ids":{"openalex":"https://openalex.org/W3126705999","doi":"https://doi.org/10.1109/isocc50952.2020.9332940","mag":"3126705999"},"language":"en","primary_location":{"id":"doi:10.1109/isocc50952.2020.9332940","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc50952.2020.9332940","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100370767","display_name":"Jiayi Liu","orcid":"https://orcid.org/0000-0002-6995-0747"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiayi Liu","raw_affiliation_strings":["College of Information Science and Electronic Engineering, Zhejiang University, Zhejiang, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Information Science and Electronic Engineering, Zhejiang University, Zhejiang, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091073331","display_name":"Kejie Huang","orcid":"https://orcid.org/0000-0003-3722-9979"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kejie Huang","raw_affiliation_strings":["College of Information Science and Electronic Engineering, Zhejiang University, Zhejiang, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Information Science and Electronic Engineering, Zhejiang University, Zhejiang, China","institution_ids":["https://openalex.org/I76130692"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I76130692"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"126","last_page":"127"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9919999837875366,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8250603675842285},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.7554118633270264},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4735780656337738},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.46103715896606445},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3979973793029785},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3815971314907074},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.32536500692367554},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.1895132064819336},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.06140637397766113}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8250603675842285},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.7554118633270264},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4735780656337738},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.46103715896606445},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3979973793029785},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3815971314907074},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.32536500692367554},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.1895132064819336},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.06140637397766113},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isocc50952.2020.9332940","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc50952.2020.9332940","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1604973310","https://openalex.org/W2565280077","https://openalex.org/W2794220509","https://openalex.org/W2944898315","https://openalex.org/W3005729543","https://openalex.org/W4243576563"],"related_works":["https://openalex.org/W1975289146","https://openalex.org/W2105887828","https://openalex.org/W2087240539","https://openalex.org/W4236520801","https://openalex.org/W2122599759","https://openalex.org/W1537234410","https://openalex.org/W1995022398","https://openalex.org/W115923022","https://openalex.org/W2484602794","https://openalex.org/W2373013700"],"abstract_inverted_index":{"Computing-In":[0],"Memory":[1],"(CIM)":[2],"has":[3],"been":[4],"widely":[5],"used":[6,19],"to":[7,23,39],"accelerate":[8],"the":[9,25,29,51,56],"inferencing":[10],"speed":[11],"of":[12,28],"deep":[13],"learning.":[14],"Network-on-Chips":[15],"(NoCs)":[16],"are":[17],"usually":[18],"together":[20],"with":[21],"CIM":[22],"enable":[24],"versatile":[26],"ability":[27],"hardware.":[30],"This":[31],"paper":[32],"proposes":[33],"a":[34],"bandwidth":[35,44,59],"aware":[36],"mapping":[37],"scheme":[38,53],"minimize":[40],"both":[41],"hops":[42,57],"and":[43,58,65],"requirement.":[45],"The":[46],"simulation":[47],"results":[48],"show":[49],"that":[50],"proposed":[52],"could":[54],"reduce":[55],"requirements":[60],"by":[61],"more":[62],"than":[63],"33.57%":[64],"46.13%,":[66],"respectively.":[67]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}