{"id":"https://openalex.org/W2917700567","doi":"https://doi.org/10.1109/isocc.2018.8649944","title":"Performance Metrics of Inexact Multipliers Based on Approximate 5:2 Compressors","display_name":"Performance Metrics of Inexact Multipliers Based on Approximate 5:2 Compressors","publication_year":2018,"publication_date":"2018-11-01","ids":{"openalex":"https://openalex.org/W2917700567","doi":"https://doi.org/10.1109/isocc.2018.8649944","mag":"2917700567"},"language":"en","primary_location":{"id":"doi:10.1109/isocc.2018.8649944","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc.2018.8649944","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006097974","display_name":"Lavanya Maddisetti","orcid":"https://orcid.org/0000-0001-6284-1444"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Lavanya Maddisetti","raw_affiliation_strings":["C-ACRL, Vardhaman College of Engineering, Shamshabad, Telangana, India"],"affiliations":[{"raw_affiliation_string":"C-ACRL, Vardhaman College of Engineering, Shamshabad, Telangana, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042909873","display_name":"J. V. R. Ravindra","orcid":"https://orcid.org/0000-0001-7636-1791"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"JVR Ravindra","raw_affiliation_strings":["C-ACRL, Vardhaman College of Engineering, Shamshabad, Telangana, India"],"affiliations":[{"raw_affiliation_string":"C-ACRL, Vardhaman College of Engineering, Shamshabad, Telangana, India","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5006097974"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2575,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.59905092,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"11","issue":null,"first_page":"84","last_page":"85"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7195934057235718},{"id":"https://openalex.org/keywords/cadence","display_name":"Cadence","score":0.697517991065979},{"id":"https://openalex.org/keywords/gas-compressor","display_name":"Gas compressor","score":0.5839762687683105},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.5765666365623474},{"id":"https://openalex.org/keywords/approximation-error","display_name":"Approximation error","score":0.48120027780532837},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.46673381328582764},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.43885213136672974},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.437118262052536},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.4307734966278076},{"id":"https://openalex.org/keywords/product","display_name":"Product (mathematics)","score":0.4213988184928894},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.4206007719039917},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.4128470718860626},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3753153681755066},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.29388970136642456},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.22766229510307312},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.18234941363334656},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10587325692176819},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.10524556040763855},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08000066876411438}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7195934057235718},{"id":"https://openalex.org/C2777125575","wikidata":"https://www.wikidata.org/wiki/Q14088448","display_name":"Cadence","level":2,"score":0.697517991065979},{"id":"https://openalex.org/C131097465","wikidata":"https://www.wikidata.org/wiki/Q178898","display_name":"Gas compressor","level":2,"score":0.5839762687683105},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.5765666365623474},{"id":"https://openalex.org/C122383733","wikidata":"https://www.wikidata.org/wiki/Q865920","display_name":"Approximation error","level":2,"score":0.48120027780532837},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.46673381328582764},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.43885213136672974},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.437118262052536},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.4307734966278076},{"id":"https://openalex.org/C90673727","wikidata":"https://www.wikidata.org/wiki/Q901718","display_name":"Product (mathematics)","level":2,"score":0.4213988184928894},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.4206007719039917},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.4128470718860626},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3753153681755066},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.29388970136642456},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.22766229510307312},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.18234941363334656},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10587325692176819},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.10524556040763855},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08000066876411438},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isocc.2018.8649944","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc.2018.8649944","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1527150509","https://openalex.org/W1998824039","https://openalex.org/W2109489315","https://openalex.org/W2136752682","https://openalex.org/W2784087931"],"related_works":["https://openalex.org/W4289538008","https://openalex.org/W3186427148","https://openalex.org/W2138282914","https://openalex.org/W2065850627","https://openalex.org/W2017012638","https://openalex.org/W1966793535","https://openalex.org/W2071885361","https://openalex.org/W1964447062","https://openalex.org/W1978219043","https://openalex.org/W2088265144"],"abstract_inverted_index":{"Approximate":[0],"computing":[1],"has":[2,38,79],"become":[3],"an":[4],"important":[5],"design":[6],"paradigm":[7],"in":[8,41,73],"innumerable":[9],"applications":[10],"like":[11],"multimedia":[12],"processing,":[13,15],"signal":[14],"and":[16,28,82],"machine":[17],"learning":[18],"to":[19],"lower":[20],"the":[21,60,94],"performance":[22],"metrics":[23],"such":[24],"as":[25],"power,":[26],"delay":[27],"area":[29],"of":[30,53,58,62],"any":[31],"circuit.":[32],"In":[33],"this":[34,42,63],"process":[35],"approximate":[36],"multiplier":[37],"been":[39,80],"demonstrated":[40],"paper,":[43],"employing":[44],"inexact":[45],"5:2":[46],"compressors":[47],"for":[48,93],"partial":[49],"product":[50],"reduction":[51],"stage":[52],"multiplication":[54],"operation.":[55],"The":[56],"simulations":[57],"all":[59],"architectures":[61],"paper":[64],"are":[65,91],"done":[66],"with":[67],"Cadence":[68],"Virtuoso":[69],"using":[70],"Spectre":[71],"\u00a9simulator":[72],"45nm":[74],"technology":[75],"node.":[76],"Error":[77,83,86,89],"analysis":[78],"performed":[81],"Distance,":[84,87],"Mean":[85],"Normalized":[88],"Distance":[90],"found":[92],"proposed":[95],"multipliers.":[96]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
