{"id":"https://openalex.org/W2561928808","doi":"https://doi.org/10.1109/isocc.2016.7799757","title":"A RAM cache approach using host memory buffer of the NVMe interface","display_name":"A RAM cache approach using host memory buffer of the NVMe interface","publication_year":2016,"publication_date":"2016-10-01","ids":{"openalex":"https://openalex.org/W2561928808","doi":"https://doi.org/10.1109/isocc.2016.7799757","mag":"2561928808"},"language":"en","primary_location":{"id":"doi:10.1109/isocc.2016.7799757","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc.2016.7799757","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081566632","display_name":"Juhyung Hong","orcid":"https://orcid.org/0000-0001-8025-6791"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"JuHyung Hong","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048986257","display_name":"Sangwoo Han","orcid":"https://orcid.org/0000-0003-0741-1075"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"SangWoo Han","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084016800","display_name":"Eui-Young Chung","orcid":"https://orcid.org/0000-0003-2013-8763"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Eui-Young Chung","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2954,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.67136144,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"109","last_page":"110"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9940000176429749,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7925080060958862},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.6429891586303711},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5997898578643799},{"id":"https://openalex.org/keywords/host","display_name":"Host (biology)","score":0.5511278510093689},{"id":"https://openalex.org/keywords/write-buffer","display_name":"Write buffer","score":0.5333903431892395},{"id":"https://openalex.org/keywords/buffer","display_name":"Buffer (optical fiber)","score":0.46216699481010437},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4552629292011261},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.4377894699573517},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.4173041880130768},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.41454052925109863},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35160714387893677},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.2914964556694031}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7925080060958862},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.6429891586303711},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5997898578643799},{"id":"https://openalex.org/C126831891","wikidata":"https://www.wikidata.org/wiki/Q221673","display_name":"Host (biology)","level":2,"score":0.5511278510093689},{"id":"https://openalex.org/C89089495","wikidata":"https://www.wikidata.org/wiki/Q8038418","display_name":"Write buffer","level":5,"score":0.5333903431892395},{"id":"https://openalex.org/C145018004","wikidata":"https://www.wikidata.org/wiki/Q4985944","display_name":"Buffer (optical fiber)","level":2,"score":0.46216699481010437},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4552629292011261},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.4377894699573517},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.4173041880130768},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.41454052925109863},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35160714387893677},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.2914964556694031},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isocc.2016.7799757","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc.2016.7799757","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5600000023841858,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322030","display_name":"Ministry of Science, ICT and Future Planning","ror":"https://ror.org/032e49973"},{"id":"https://openalex.org/F4320332195","display_name":"Samsung","ror":"https://ror.org/04w3jy968"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2140948853"],"related_works":["https://openalex.org/W2977978932","https://openalex.org/W3027347211","https://openalex.org/W2383226856","https://openalex.org/W2072590764","https://openalex.org/W2348988202","https://openalex.org/W150152345","https://openalex.org/W1590019873","https://openalex.org/W2188061826","https://openalex.org/W2330107863","https://openalex.org/W1531550220"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"new":[3],"methods":[4],"with":[5,47],"Host":[6,17,41,63],"Memory":[7,18,42,64],"Buffer":[8,19,43],"to":[9,83],"improve":[10],"IO":[11,73],"performance":[12,71],"in":[13,77],"NVMe":[14,51],"interface.":[15],"Although":[16],"is":[20],"a":[21,84],"versatile":[22],"memory":[23,61],"architecture,":[24],"it":[25],"has":[26],"been":[27],"considered":[28],"limitedly":[29],"as":[30,34,44],"metadata":[31],"cache":[32,46],"such":[33],"Logical-to-Physical":[35],"table.":[36],"The":[37,66],"proposed":[38,67],"architecture":[39,68],"uses":[40],"data":[45],"modification":[48],"of":[49,72,79],"an":[50],"command":[52],"process":[53],"and":[54,62],"the":[55,70],"additional":[56],"DMA":[57],"path":[58],"between":[59],"system":[60],"Buffer.":[65],"improves":[69],"request":[74],"by":[75],"23%":[76],"case":[78],"sequential":[80],"writes":[81],"compared":[82],"device":[85],"buffer":[86],"architecture.":[87]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}