{"id":"https://openalex.org/W2563562482","doi":"https://doi.org/10.1109/isocc.2016.7799709","title":"All-synthesizable transmitter driver and data recovery circuit for USB2.0 interface","display_name":"All-synthesizable transmitter driver and data recovery circuit for USB2.0 interface","publication_year":2016,"publication_date":"2016-10-01","ids":{"openalex":"https://openalex.org/W2563562482","doi":"https://doi.org/10.1109/isocc.2016.7799709","mag":"2563562482"},"language":"en","primary_location":{"id":"doi:10.1109/isocc.2016.7799709","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc.2016.7799709","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005766883","display_name":"Kihwan Seong","orcid":null},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Kihwan Seong","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008470986","display_name":"Won\u2013Cheol Lee","orcid":"https://orcid.org/0000-0001-8535-3988"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Won-Cheol Lee","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052722005","display_name":"Byungsub Kim","orcid":"https://orcid.org/0000-0003-1528-6235"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Byungsub Kim","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033088278","display_name":"Jae\u2010Yoon Sim","orcid":"https://orcid.org/0000-0003-1814-6211"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jae-Yoon Sim","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103066003","display_name":"Hong-June Park","orcid":null},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hong-June Park","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5005766883"],"corresponding_institution_ids":["https://openalex.org/I123900574"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.14291309,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"63","last_page":"64"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.972599983215332,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.9620000123977661,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transmitter","display_name":"Transmitter","score":0.8428547382354736},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6217280030250549},{"id":"https://openalex.org/keywords/serdes","display_name":"SerDes","score":0.6093257665634155},{"id":"https://openalex.org/keywords/driver-circuit","display_name":"Driver circuit","score":0.572613537311554},{"id":"https://openalex.org/keywords/data-recovery","display_name":"Data recovery","score":0.5636127591133118},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5140815377235413},{"id":"https://openalex.org/keywords/swing","display_name":"Swing","score":0.4739392101764679},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.46977537870407104},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.46419182419776917},{"id":"https://openalex.org/keywords/software-portability","display_name":"Software portability","score":0.4566037952899933},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.44291603565216064},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.42370787262916565},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4188659191131592},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4140186905860901},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3318505585193634},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22905051708221436},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.18874168395996094},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.14983603358268738},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.0989815890789032}],"concepts":[{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.8428547382354736},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6217280030250549},{"id":"https://openalex.org/C19707634","wikidata":"https://www.wikidata.org/wiki/Q6510662","display_name":"SerDes","level":2,"score":0.6093257665634155},{"id":"https://openalex.org/C183848499","wikidata":"https://www.wikidata.org/wiki/Q4167572","display_name":"Driver circuit","level":3,"score":0.572613537311554},{"id":"https://openalex.org/C529754248","wikidata":"https://www.wikidata.org/wiki/Q1054772","display_name":"Data recovery","level":2,"score":0.5636127591133118},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5140815377235413},{"id":"https://openalex.org/C65655974","wikidata":"https://www.wikidata.org/wiki/Q14867674","display_name":"Swing","level":2,"score":0.4739392101764679},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.46977537870407104},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.46419182419776917},{"id":"https://openalex.org/C63000827","wikidata":"https://www.wikidata.org/wiki/Q3080428","display_name":"Software portability","level":2,"score":0.4566037952899933},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.44291603565216064},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.42370787262916565},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4188659191131592},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4140186905860901},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3318505585193634},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22905051708221436},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.18874168395996094},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.14983603358268738},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0989815890789032},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isocc.2016.7799709","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isocc.2016.7799709","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International SoC Design Conference (ISOCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8500000238418579,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2006427734","https://openalex.org/W2086877167","https://openalex.org/W2171944460","https://openalex.org/W2487398161","https://openalex.org/W6685379949"],"related_works":["https://openalex.org/W3139698832","https://openalex.org/W2015577501","https://openalex.org/W2080067415","https://openalex.org/W2048685279","https://openalex.org/W2889010993","https://openalex.org/W2107539065","https://openalex.org/W2267049830","https://openalex.org/W2563562482","https://openalex.org/W2108001330","https://openalex.org/W2593571787"],"abstract_inverted_index":{"The":[0,25,57,74,124],"transmitter":[1,26,76,91,125],"driver":[2,27,77,92,126],"and":[3,19,47,78,103,119,127,135],"the":[4,90,94,99,104,128],"data":[5,58,79,105,118,129],"recovery":[6,59,80,106,130],"circuit":[7,60,131],"of":[8],"receiver":[9],"for":[10,44,54],"480":[11,71],"Mbps":[12],"USB2.0":[13,95,121],"interface":[14],"were":[15,82],"designed":[16],"with":[17,69,115],"Verilog":[18],"synthesized":[20],"to":[21,36],"enhance":[22],"design":[23],"portability.":[24],"was":[28,61],"implemented":[29,62],"by":[30,63],"using":[31,64],"multiple":[32],"tri-state":[33],"inverter":[34],"cells":[35],"generate":[37],"a":[38,48,65,85,109,120],"0":[39,49],"~":[40,50],"400":[41],"mV":[42,52],"swing":[43,53],"normal":[45],"operation":[46],"800":[51],"chirp":[55],"operation.":[56],"blind":[66],"over-sampling":[67],"method":[68],"5-phase":[70],"MHz":[72],"clocks.":[73],"proposed":[75],"circuits":[81,107],"fabricated":[83],"in":[84,98],"65":[86],"nm":[87],"CMOS":[88],"process;":[89],"satisfies":[93],"eye-mask":[96],"specification":[97],"measured":[100,110],"eye":[101],"diagrams":[102],"gives":[108],"BER":[111],"less":[112],"than":[113],"1E-12":[114],"PRBS":[116],"2E31-1":[117],"5m":[122],"cable.":[123],"consume":[132],"24.3":[133],"mW":[134],"1.6":[136],"mW,":[137],"respectively":[138],"at":[139],"1.2":[140],"V":[141],"supply.":[142]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}