{"id":"https://openalex.org/W2143781875","doi":"https://doi.org/10.1109/ismvl.2002.1011070","title":"Multiple-valued data recovery techniques for band-limited channels in VLSI","display_name":"Multiple-valued data recovery techniques for band-limited channels in VLSI","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2143781875","doi":"https://doi.org/10.1109/ismvl.2002.1011070","mag":"2143781875"},"language":"en","primary_location":{"id":"doi:10.1109/ismvl.2002.1011070","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ismvl.2002.1011070","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 32nd IEEE International Symposium on Multiple- Valued Logic","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050845057","display_name":"Yasushi Yuminaka","orcid":"https://orcid.org/0000-0003-2054-8041"},"institutions":[{"id":"https://openalex.org/I258063972","display_name":"Kiryu University","ror":"https://ror.org/02snehe53","country_code":"JP","type":"education","lineage":["https://openalex.org/I258063972"]},{"id":"https://openalex.org/I165735259","display_name":"Gunma University","ror":"https://ror.org/046fm7598","country_code":"JP","type":"education","lineage":["https://openalex.org/I165735259"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Y. Yuminaka","raw_affiliation_strings":["Department of Electronic Engineering, Faculty of Engineering Gunma University, Kiryu, Japan","[Dept. of Electron. Eng., Gunma Univ., Japan]"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Faculty of Engineering Gunma University, Kiryu, Japan","institution_ids":["https://openalex.org/I258063972","https://openalex.org/I165735259"]},{"raw_affiliation_string":"[Dept. of Electron. Eng., Gunma Univ., Japan]","institution_ids":["https://openalex.org/I165735259"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033170169","display_name":"T. Morishita","orcid":null},"institutions":[{"id":"https://openalex.org/I258063972","display_name":"Kiryu University","ror":"https://ror.org/02snehe53","country_code":"JP","type":"education","lineage":["https://openalex.org/I258063972"]},{"id":"https://openalex.org/I165735259","display_name":"Gunma University","ror":"https://ror.org/046fm7598","country_code":"JP","type":"education","lineage":["https://openalex.org/I165735259"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Morishita","raw_affiliation_strings":["Department of Electronic Engineering, Faculty of Engineering Gunma University, Kiryu, Japan","[Dept. of Electron. Eng., Gunma Univ., Japan]"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Faculty of Engineering Gunma University, Kiryu, Japan","institution_ids":["https://openalex.org/I258063972","https://openalex.org/I165735259"]},{"raw_affiliation_string":"[Dept. of Electron. Eng., Gunma Univ., Japan]","institution_ids":["https://openalex.org/I165735259"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037666211","display_name":"Takafumi Aoki","orcid":"https://orcid.org/0000-0001-8308-2416"},"institutions":[{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]},{"id":"https://openalex.org/I165735259","display_name":"Gunma University","ror":"https://ror.org/046fm7598","country_code":"JP","type":"education","lineage":["https://openalex.org/I165735259"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Aoki","raw_affiliation_strings":["Department of System Information Sciences, Tohoku University, Sendai, Japan","Gunma University#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of System Information Sciences, Tohoku University, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]},{"raw_affiliation_string":"Gunma University#TAB#","institution_ids":["https://openalex.org/I165735259"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111761099","display_name":"T. Higuchi","orcid":null},"institutions":[{"id":"https://openalex.org/I165735259","display_name":"Gunma University","ror":"https://ror.org/046fm7598","country_code":"JP","type":"education","lineage":["https://openalex.org/I165735259"]},{"id":"https://openalex.org/I201537933","display_name":"Tohoku University","ror":"https://ror.org/01dq60k83","country_code":"JP","type":"education","lineage":["https://openalex.org/I201537933"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Higuchi","raw_affiliation_strings":["Department of System Information Sciences, Tohoku University, Sendai, Japan","Gunma University#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of System Information Sciences, Tohoku University, Sendai, Japan","institution_ids":["https://openalex.org/I201537933"]},{"raw_affiliation_string":"Gunma University#TAB#","institution_ids":["https://openalex.org/I165735259"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5050845057"],"corresponding_institution_ids":["https://openalex.org/I165735259","https://openalex.org/I258063972"],"apc_list":null,"apc_paid":null,"fwci":0.2938,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.62781923,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"e82 c","issue":null,"first_page":"54","last_page":"60"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/intersymbol-interference","display_name":"Intersymbol interference","score":0.8638291358947754},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7381250858306885},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7281081676483154},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.6743122935295105},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6540547609329224},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5039004683494568},{"id":"https://openalex.org/keywords/data-transmission","display_name":"Data transmission","score":0.47152790427207947},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.40138623118400574},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.3839394748210907},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.2876822352409363},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.25793224573135376},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.21883660554885864},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17544010281562805}],"concepts":[{"id":"https://openalex.org/C97812054","wikidata":"https://www.wikidata.org/wiki/Q2166055","display_name":"Intersymbol interference","level":3,"score":0.8638291358947754},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7381250858306885},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7281081676483154},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.6743122935295105},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6540547609329224},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5039004683494568},{"id":"https://openalex.org/C557945733","wikidata":"https://www.wikidata.org/wiki/Q389772","display_name":"Data transmission","level":2,"score":0.47152790427207947},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.40138623118400574},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.3839394748210907},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.2876822352409363},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25793224573135376},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.21883660554885864},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17544010281562805}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ismvl.2002.1011070","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ismvl.2002.1011070","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 32nd IEEE International Symposium on Multiple- Valued Logic","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6899999976158142}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W411618619","https://openalex.org/W1480210121","https://openalex.org/W1518519162","https://openalex.org/W1525552993","https://openalex.org/W1932348253","https://openalex.org/W2111832826","https://openalex.org/W2156396969","https://openalex.org/W3156180720","https://openalex.org/W4238327122","https://openalex.org/W4243419187","https://openalex.org/W6631011678","https://openalex.org/W6683193340","https://openalex.org/W6794420288"],"related_works":["https://openalex.org/W2150616327","https://openalex.org/W2068165465","https://openalex.org/W2005714873","https://openalex.org/W2098218272","https://openalex.org/W2163915119","https://openalex.org/W1572837867","https://openalex.org/W2141748053","https://openalex.org/W2031051084","https://openalex.org/W2362169398","https://openalex.org/W2139353707"],"abstract_inverted_index":{"Increasing":[0],"VLSI":[1,76],"system":[2],"performance":[3],"requires":[4],"higher":[5],"bus":[6],"bandwidths":[7],"while":[8],"maintaining":[9],"low":[10],"cost":[11],"in":[12,75,98],"area,":[13],"power":[14],"and":[15],"complexity.":[16],"Bus":[17],"bandwidth":[18,49,90],"improvement":[19],"is":[20,28],"historically":[21],"achieved":[22],"by":[23,30],"increased":[24],"clock":[25,52],"frequency,":[26,53],"but":[27],"restricted":[29],"a":[31,43,82,88,93],"signal":[32,45],"deterioration":[33],"due":[34],"to":[35,70,86,100],"intersymbol":[36],"interference":[37],"(ISI).":[38],"Although":[39],"the":[40],"use":[41],"of":[42],"multi-level":[44,79],"can":[46],"increase":[47],"signaling":[48,80],"without":[50,91],"increasing":[51],"ISI":[54],"becomes":[55],"severer":[56],"than":[57],"binary":[58],"signals.":[59],"This":[60],"paper":[61],"investigates":[62],"multiple-valued":[63,108],"data":[64,73,103],"recovery":[65],"techniques":[66],"for":[67],"band-limited":[68],"channels":[69],"achieve":[71],"high-speed":[72],"transmission":[74],"systems.":[77],"The":[78],"employs":[81],"simple":[83],"equalization":[84],"technique":[85],"improve":[87],"channel":[89],"using":[92],"complex":[94],"adaptive":[95],"equalizer.":[96],"Also,":[97],"order":[99],"realize":[101],"band-efficient":[102],"transmission,":[104],"we":[105],"present":[106],"intra-chip":[107],"code-division":[109],"multiple":[110],"access":[111],"(MV-CDMA)":[112],"techniques.":[113]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}