{"id":"https://openalex.org/W4386859347","doi":"https://doi.org/10.1109/islped58423.2023.10244724","title":"Cryogenic CMOS as an Enabler for Low Power Dynamic Logic","display_name":"Cryogenic CMOS as an Enabler for Low Power Dynamic Logic","publication_year":2023,"publication_date":"2023-08-07","ids":{"openalex":"https://openalex.org/W4386859347","doi":"https://doi.org/10.1109/islped58423.2023.10244724"},"language":"en","primary_location":{"id":"doi:10.1109/islped58423.2023.10244724","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped58423.2023.10244724","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034707400","display_name":"Rakshith Saligram","orcid":"https://orcid.org/0000-0002-7436-9375"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Rakshith Saligram","raw_affiliation_strings":["School of Electrical &#x0026; Computer Engineering Georgia Institute of Technology,Atlanta,USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical &#x0026; Computer Engineering Georgia Institute of Technology,Atlanta,USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036105393","display_name":"Suman Datta","orcid":"https://orcid.org/0000-0001-6044-5173"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Suman Datta","raw_affiliation_strings":["School of Electrical &#x0026; Computer Engineering Georgia Institute of Technology,Atlanta,USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical &#x0026; Computer Engineering Georgia Institute of Technology,Atlanta,USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091408102","display_name":"Arijit Raychowdhury","orcid":"https://orcid.org/0000-0001-8391-0576"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arijit Raychowdhury","raw_affiliation_strings":["School of Electrical &#x0026; Computer Engineering Georgia Institute of Technology,Atlanta,USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical &#x0026; Computer Engineering Georgia Institute of Technology,Atlanta,USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5034707400"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":0.1339,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.44426538,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/domino-logic","display_name":"Domino logic","score":0.6546168327331543},{"id":"https://openalex.org/keywords/subthreshold-conduction","display_name":"Subthreshold conduction","score":0.6060509085655212},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5763109922409058},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.562030017375946},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5499347448348999},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.5387185215950012},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.4983794689178467},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.486320823431015},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.41496598720550537},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.3740459680557251},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.3646695017814636},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.2855260372161865},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.27127885818481445},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24585020542144775}],"concepts":[{"id":"https://openalex.org/C2777555262","wikidata":"https://www.wikidata.org/wiki/Q173391","display_name":"Domino logic","level":5,"score":0.6546168327331543},{"id":"https://openalex.org/C156465305","wikidata":"https://www.wikidata.org/wiki/Q1658601","display_name":"Subthreshold conduction","level":4,"score":0.6060509085655212},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5763109922409058},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.562030017375946},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5499347448348999},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.5387185215950012},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.4983794689178467},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.486320823431015},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.41496598720550537},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3740459680557251},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.3646695017814636},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.2855260372161865},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.27127885818481445},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24585020542144775}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/islped58423.2023.10244724","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped58423.2023.10244724","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1985408000","https://openalex.org/W2031967364","https://openalex.org/W2081422077","https://openalex.org/W2104733895","https://openalex.org/W2542450275","https://openalex.org/W2585039363","https://openalex.org/W2996946661","https://openalex.org/W3037447387","https://openalex.org/W3089495739","https://openalex.org/W3107649711","https://openalex.org/W3160393719","https://openalex.org/W3163303881","https://openalex.org/W3210209504","https://openalex.org/W3215770327","https://openalex.org/W6630972654"],"related_works":["https://openalex.org/W2993547433","https://openalex.org/W2809178110","https://openalex.org/W2785498221","https://openalex.org/W2241814608","https://openalex.org/W2537156413","https://openalex.org/W1488268497","https://openalex.org/W2181750486","https://openalex.org/W2107702250","https://openalex.org/W2914547607","https://openalex.org/W2810733745"],"abstract_inverted_index":{"Cryogenic":[0],"High-Performance":[1],"Computing":[2],"(HPC)":[3],"has":[4],"gained":[5],"traction":[6],"for":[7],"server":[8],"and":[9,18,27,69,95,121],"cloud":[10],"systems":[11],"which":[12,64],"demand":[13],"large":[14],"scale,":[15],"energy":[16,102,120,125,152],"efficient":[17],"fast":[19],"computing":[20],"systems.":[21],"Dynamic":[22],"logic":[23,97],"satisfies":[24],"these":[25],"goals":[26],"at":[28,118,126,129],"cryogenic":[29],"temperature,":[30],"its":[31],"inherent":[32],"problems":[33],"of":[34,60],"charge":[35],"leakage":[36,47],"are":[37],"readily":[38],"addressed":[39],"thanks":[40],"to":[41,71,93,99,113,132,140,163],"the":[42,74,107,138,148],"exponential":[43],"reduction":[44],"in":[45,116,124],"subthreshold":[46],"currents.":[48],"Fully":[49],"Depleted":[50],"Silicon":[51],"on":[52],"Insulator":[53],"(FDSOI)":[54],"devices":[55],"present":[56,83],"an":[57],"additional":[58],"\u201cdial\u201d":[59],"back":[61,88],"gate":[62,89],"biasing":[63,90],"opens":[65],"multiple":[66],"design":[67],"options":[68],"solutions":[70],"further":[72,135],"enhance":[73],"circuit":[75,139],"power":[76],"performance":[77,157],"metrics.":[78],"In":[79],"this":[80],"paper":[81],"we":[82,110],"a":[84,141],"solution":[85],"-":[86],"selective":[87],"\u2015":[91],"applied":[92],"dynamic":[94],"domino":[96],"circuits,":[98],"increase":[100],"their":[101],"efficiency":[103,153],"and/or":[104,156],"performance.":[105],"With":[106],"proposed":[108,149],"method,":[109],"show":[111],"up":[112,137],"48%":[114],"decrease":[115,123],"delay":[117,128],"constant":[119,127],"41%":[122],"77K":[130],"compared":[131],"300K.":[133],"We":[134],"scale":[136],"radix-4":[142],"sparse-2":[143],"64":[144],"bit":[145],"adder":[146],"where":[147],"technique":[150],"increases":[151],"by":[154,158],"53%":[155],"56%":[159],"going":[160],"from":[161],"300K":[162],"77K.":[164]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
