{"id":"https://openalex.org/W4386859291","doi":"https://doi.org/10.1109/islped58423.2023.10244499","title":"LAXOR: A Bit-Accurate BNN Accelerator with Latch-XOR Logic for Local Computing","display_name":"LAXOR: A Bit-Accurate BNN Accelerator with Latch-XOR Logic for Local Computing","publication_year":2023,"publication_date":"2023-08-07","ids":{"openalex":"https://openalex.org/W4386859291","doi":"https://doi.org/10.1109/islped58423.2023.10244499"},"language":"en","primary_location":{"id":"doi:10.1109/islped58423.2023.10244499","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped58423.2023.10244499","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101989428","display_name":"Dongrui Li","orcid":"https://orcid.org/0000-0002-7641-3886"},"institutions":[{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]},{"id":"https://openalex.org/I152815399","display_name":"Singapore University of Technology and Design","ror":"https://ror.org/05j6fvn87","country_code":"SG","type":"education","lineage":["https://openalex.org/I152815399"]},{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Dongrui Li","raw_affiliation_strings":["Singapore University of Technology and Design","Institute of Microelectronics, Agency for Science, Technology & Research (A*STAR), Singapore"],"affiliations":[{"raw_affiliation_string":"Singapore University of Technology and Design","institution_ids":["https://openalex.org/I152815399"]},{"raw_affiliation_string":"Institute of Microelectronics, Agency for Science, Technology & Research (A*STAR), Singapore","institution_ids":["https://openalex.org/I115228651","https://openalex.org/I4210090209"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016596757","display_name":"Tomomasa Yamasaki","orcid":"https://orcid.org/0000-0002-5610-8534"},"institutions":[{"id":"https://openalex.org/I152815399","display_name":"Singapore University of Technology and Design","ror":"https://ror.org/05j6fvn87","country_code":"SG","type":"education","lineage":["https://openalex.org/I152815399"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Tomomasa Yamasaki","raw_affiliation_strings":["Singapore University of Technology and Design"],"affiliations":[{"raw_affiliation_string":"Singapore University of Technology and Design","institution_ids":["https://openalex.org/I152815399"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013201833","display_name":"Aarthy Mani","orcid":"https://orcid.org/0000-0002-6159-6974"},"institutions":[{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]},{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Aarthy Mani","raw_affiliation_strings":["Institute of Microelectronics, Agency for Science, Technology &#x0026; Research (A*STAR),Singapore"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Agency for Science, Technology &#x0026; Research (A*STAR),Singapore","institution_ids":["https://openalex.org/I115228651","https://openalex.org/I4210090209"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101615706","display_name":"Anh Tuan","orcid":"https://orcid.org/0000-0002-8320-6818"},"institutions":[{"id":"https://openalex.org/I115228651","display_name":"Agency for Science, Technology and Research","ror":"https://ror.org/036wvzt09","country_code":"SG","type":"government","lineage":["https://openalex.org/I115228651"]},{"id":"https://openalex.org/I4210090209","display_name":"Institute of Microelectronics","ror":"https://ror.org/009rw8n36","country_code":"SG","type":"facility","lineage":["https://openalex.org/I115228651","https://openalex.org/I4210090209","https://openalex.org/I91275662"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Anh Tuan Do","raw_affiliation_strings":["Institute of Microelectronics, Agency for Science, Technology &#x0026; Research (A*STAR),Singapore"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics, Agency for Science, Technology &#x0026; Research (A*STAR),Singapore","institution_ids":["https://openalex.org/I115228651","https://openalex.org/I4210090209"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050993305","display_name":"Niangjun Chen","orcid":"https://orcid.org/0000-0002-2289-9737"},"institutions":[{"id":"https://openalex.org/I152815399","display_name":"Singapore University of Technology and Design","ror":"https://ror.org/05j6fvn87","country_code":"SG","type":"education","lineage":["https://openalex.org/I152815399"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Niangjun Chen","raw_affiliation_strings":["Singapore University of Technology and Design"],"affiliations":[{"raw_affiliation_string":"Singapore University of Technology and Design","institution_ids":["https://openalex.org/I152815399"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024806199","display_name":"Bo Wang","orcid":"https://orcid.org/0000-0002-9381-6679"},"institutions":[{"id":"https://openalex.org/I152815399","display_name":"Singapore University of Technology and Design","ror":"https://ror.org/05j6fvn87","country_code":"SG","type":"education","lineage":["https://openalex.org/I152815399"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Bo Wang","raw_affiliation_strings":["Singapore University of Technology and Design"],"affiliations":[{"raw_affiliation_string":"Singapore University of Technology and Design","institution_ids":["https://openalex.org/I152815399"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5101989428"],"corresponding_institution_ids":["https://openalex.org/I115228651","https://openalex.org/I152815399","https://openalex.org/I4210090209"],"apc_list":null,"apc_paid":null,"fwci":0.1339,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.44425716,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12676","display_name":"Machine Learning and ELM","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7338418960571289},{"id":"https://openalex.org/keywords/xor-gate","display_name":"XOR gate","score":0.6822733879089355},{"id":"https://openalex.org/keywords/bitwise-operation","display_name":"Bitwise operation","score":0.6440560817718506},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.46425822377204895},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.4601614475250244},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.44321537017822266},{"id":"https://openalex.org/keywords/stochastic-computing","display_name":"Stochastic computing","score":0.43811413645744324},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.42941954731941223},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.4225977063179016},{"id":"https://openalex.org/keywords/convolution","display_name":"Convolution (computer science)","score":0.41957828402519226},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.40737003087997437},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3484182059764862},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.2959427833557129},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2806447148323059},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.21135786175727844},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11576366424560547},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10820293426513672},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10388344526290894}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7338418960571289},{"id":"https://openalex.org/C28495749","wikidata":"https://www.wikidata.org/wiki/Q155516","display_name":"XOR gate","level":3,"score":0.6822733879089355},{"id":"https://openalex.org/C134765980","wikidata":"https://www.wikidata.org/wiki/Q879126","display_name":"Bitwise operation","level":2,"score":0.6440560817718506},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.46425822377204895},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.4601614475250244},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.44321537017822266},{"id":"https://openalex.org/C2780971903","wikidata":"https://www.wikidata.org/wiki/Q2933705","display_name":"Stochastic computing","level":3,"score":0.43811413645744324},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.42941954731941223},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.4225977063179016},{"id":"https://openalex.org/C45347329","wikidata":"https://www.wikidata.org/wiki/Q5166604","display_name":"Convolution (computer science)","level":3,"score":0.41957828402519226},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.40737003087997437},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3484182059764862},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.2959427833557129},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2806447148323059},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.21135786175727844},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11576366424560547},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10820293426513672},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10388344526290894},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/islped58423.2023.10244499","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped58423.2023.10244499","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1902934009","https://openalex.org/W2790511620","https://openalex.org/W2798544842","https://openalex.org/W2894696827","https://openalex.org/W2895531329","https://openalex.org/W2911491685","https://openalex.org/W2952797486","https://openalex.org/W2962679343","https://openalex.org/W2963145956","https://openalex.org/W2963221280","https://openalex.org/W3000301330","https://openalex.org/W3015497938","https://openalex.org/W3036866137","https://openalex.org/W3110533210","https://openalex.org/W3134703406","https://openalex.org/W4212821339","https://openalex.org/W4220922172","https://openalex.org/W4247198796","https://openalex.org/W4295262505","https://openalex.org/W6693397755"],"related_works":["https://openalex.org/W2559769120","https://openalex.org/W2362925226","https://openalex.org/W4319431600","https://openalex.org/W4321449671","https://openalex.org/W4206055950","https://openalex.org/W2308335786","https://openalex.org/W1981170240","https://openalex.org/W2787635923","https://openalex.org/W2617564485","https://openalex.org/W2086855029"],"abstract_inverted_index":{"Binary":[0],"Neural":[1],"Network":[2],"(BNN)":[3],"accelerators":[4],"are":[5],"attractive":[6],"solutions":[7],"for":[8,75,105,128,180],"Artificial":[9],"Internet-of-Things":[10],"(AIoT)":[11],"applications":[12],"thanks":[13],"to":[14,34,50,53,91,114,165],"the":[15,36,92,147,166,174],"compact":[16],"models":[17],"and":[18,56,83,141],"low":[19],"computational":[20],"cost":[21],"while":[22],"maintaining":[23],"satisfactory":[24],"classification":[25],"performance.":[26],"Various":[27],"analog/mix-signal":[28],"compute-in-memory":[29],"macros":[30],"have":[31,123],"been":[32],"proposed":[33,104,175],"boost":[35],"energy":[37,87,157],"efficiency":[38,158],"of":[39,159],"binary":[40],"convolution":[41],"tasks.":[42],"However,":[43],"this":[44,60],"approach":[45],"incurs":[46],"inaccurate":[47],"computation":[48],"due":[49],"its":[51],"sensitivity":[52],"temperature,":[54],"noise,":[55],"process":[57],"variations.":[58],"In":[59],"work,":[61],"we":[62,122],"present":[63],"a":[64,70],"full-digital":[65],"BNN":[66],"architecture":[67,149],"that":[68,173],"leverages":[69],"novel":[71],"Latch-XOR":[72],"logic":[73],"array":[74],"local":[76],"bitwise":[77],"multiplication,":[78],"suppressing":[79],"massive":[80],"data":[81,106],"movement":[82],"achieving":[84],"4.2\u00d7":[85],"lower":[86],"per":[88],"operation":[89],"compared":[90,113,164],"decoupled":[93],"standard":[94],"cell":[95],"approach.":[96],"An":[97],"optimized":[98],"population":[99],"count":[100],"circuitry":[101],"is":[102,177],"also":[103],"accumulation,":[107],"which":[108],"obtains":[109],"1.37\u00d7":[110],"Energy-Delay-Area":[111],"saving":[112],"Binary-Adder-Tree-based":[115],"implementation.":[116],"To":[117],"enable":[118],"seamless":[119],"hardware-software":[120],"co-optimization,":[121],"developed":[124],"an":[125,155],"in-house":[126],"simulator":[127],"design":[129],"space":[130],"exploration":[131],"as":[132,134],"well":[133],"flexible":[135],"mapping":[136],"with":[137],"various":[138],"network":[139],"topologies":[140],"kernel":[142],"sizes.":[143],"Our":[144],"experiment":[145],"shows":[146],"Latch-XOR-based":[148],"in":[150],"28nm":[151],"CMOS":[152],"technology":[153],"achieves":[154],"enhanced":[156],"2315":[160],"TOPS/W,":[161],"3.4\u00d7":[162],"higher":[163],"state-of-the-art":[167],"synthesized":[168],"digital":[169],"architecture.":[170],"This":[171],"manifests":[172],"accelerator":[176],"highly":[178],"suited":[179],"AIoT":[181],"applications.":[182]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-01-13T01:12:25.745995","created_date":"2025-10-10T00:00:00"}
