{"id":"https://openalex.org/W4386859311","doi":"https://doi.org/10.1109/islped58423.2023.10244431","title":"Florian: Developing a Low-Power RISC-V Multicore Processor with a Shared Lightweight FPU","display_name":"Florian: Developing a Low-Power RISC-V Multicore Processor with a Shared Lightweight FPU","publication_year":2023,"publication_date":"2023-08-07","ids":{"openalex":"https://openalex.org/W4386859311","doi":"https://doi.org/10.1109/islped58423.2023.10244431"},"language":"en","primary_location":{"id":"doi:10.1109/islped58423.2023.10244431","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped58423.2023.10244431","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100752301","display_name":"Jina Park","orcid":"https://orcid.org/0000-0002-7410-1985"},"institutions":[{"id":"https://openalex.org/I67900169","display_name":"Chung-Ang University","ror":"https://ror.org/01r024a98","country_code":"KR","type":"education","lineage":["https://openalex.org/I67900169"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Jina Park","raw_affiliation_strings":["School of Electrical and Electronics Engineering, Chung-Ang University,Korea","School of Electrical and Electronics Engineering, Chung-Ang University, Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronics Engineering, Chung-Ang University,Korea","institution_ids":["https://openalex.org/I67900169"]},{"raw_affiliation_string":"School of Electrical and Electronics Engineering, Chung-Ang University, Korea","institution_ids":["https://openalex.org/I67900169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020471570","display_name":"Kyuseung Han","orcid":"https://orcid.org/0000-0002-9151-3447"},"institutions":[{"id":"https://openalex.org/I142401562","display_name":"Electronics and Telecommunications Research Institute","ror":"https://ror.org/03ysstz10","country_code":"KR","type":"facility","lineage":["https://openalex.org/I142401562","https://openalex.org/I2801339556","https://openalex.org/I4210144908","https://openalex.org/I4387152098"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyuseung Han","raw_affiliation_strings":["Electronics and Telecommunications Research Institute (ETRI),AI SoC Research Division,Korea","AI SoC Research Division, Electronics and Telecommunications Research Institute (ETRI), Korea"],"affiliations":[{"raw_affiliation_string":"Electronics and Telecommunications Research Institute (ETRI),AI SoC Research Division,Korea","institution_ids":["https://openalex.org/I142401562"]},{"raw_affiliation_string":"AI SoC Research Division, Electronics and Telecommunications Research Institute (ETRI), Korea","institution_ids":["https://openalex.org/I142401562"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028025829","display_name":"Eun\u2010Jin Choi","orcid":"https://orcid.org/0000-0001-9690-7501"},"institutions":[{"id":"https://openalex.org/I67900169","display_name":"Chung-Ang University","ror":"https://ror.org/01r024a98","country_code":"KR","type":"education","lineage":["https://openalex.org/I67900169"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Eunjin Choi","raw_affiliation_strings":["School of Electrical and Electronics Engineering, Chung-Ang University,Korea","School of Electrical and Electronics Engineering, Chung-Ang University, Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronics Engineering, Chung-Ang University,Korea","institution_ids":["https://openalex.org/I67900169"]},{"raw_affiliation_string":"School of Electrical and Electronics Engineering, Chung-Ang University, Korea","institution_ids":["https://openalex.org/I67900169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101803457","display_name":"Sukho Lee","orcid":"https://orcid.org/0009-0008-1191-0815"},"institutions":[{"id":"https://openalex.org/I142401562","display_name":"Electronics and Telecommunications Research Institute","ror":"https://ror.org/03ysstz10","country_code":"KR","type":"facility","lineage":["https://openalex.org/I142401562","https://openalex.org/I2801339556","https://openalex.org/I4210144908","https://openalex.org/I4387152098"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sukho Lee","raw_affiliation_strings":["Electronics and Telecommunications Research Institute (ETRI),AI SoC Research Division,Korea","AI SoC Research Division, Electronics and Telecommunications Research Institute (ETRI), Korea"],"affiliations":[{"raw_affiliation_string":"Electronics and Telecommunications Research Institute (ETRI),AI SoC Research Division,Korea","institution_ids":["https://openalex.org/I142401562"]},{"raw_affiliation_string":"AI SoC Research Division, Electronics and Telecommunications Research Institute (ETRI), Korea","institution_ids":["https://openalex.org/I142401562"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100767181","display_name":"Jae\u2010Jin Lee","orcid":"https://orcid.org/0000-0003-3260-1620"},"institutions":[{"id":"https://openalex.org/I142401562","display_name":"Electronics and Telecommunications Research Institute","ror":"https://ror.org/03ysstz10","country_code":"KR","type":"facility","lineage":["https://openalex.org/I142401562","https://openalex.org/I2801339556","https://openalex.org/I4210144908","https://openalex.org/I4387152098"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jae-Jin Lee","raw_affiliation_strings":["Electronics and Telecommunications Research Institute (ETRI),AI SoC Research Division,Korea","AI SoC Research Division, Electronics and Telecommunications Research Institute (ETRI), Korea"],"affiliations":[{"raw_affiliation_string":"Electronics and Telecommunications Research Institute (ETRI),AI SoC Research Division,Korea","institution_ids":["https://openalex.org/I142401562"]},{"raw_affiliation_string":"AI SoC Research Division, Electronics and Telecommunications Research Institute (ETRI), Korea","institution_ids":["https://openalex.org/I142401562"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023457389","display_name":"Woojoo Lee","orcid":"https://orcid.org/0000-0001-5736-4583"},"institutions":[{"id":"https://openalex.org/I67900169","display_name":"Chung-Ang University","ror":"https://ror.org/01r024a98","country_code":"KR","type":"education","lineage":["https://openalex.org/I67900169"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Woojoo Lee","raw_affiliation_strings":["School of Electrical and Electronics Engineering, Chung-Ang University,Korea","School of Electrical and Electronics Engineering, Chung-Ang University, Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronics Engineering, Chung-Ang University,Korea","institution_ids":["https://openalex.org/I67900169"]},{"raw_affiliation_string":"School of Electrical and Electronics Engineering, Chung-Ang University, Korea","institution_ids":["https://openalex.org/I67900169"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044650311","display_name":"Massoud Pedram","orcid":"https://orcid.org/0000-0002-2677-7307"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Massoud Pedram","raw_affiliation_strings":["University of Southern California,Department of Electrical and Computer Engineering,USA","Department of Electrical and Computer Engineering, University of Southern California, USA"],"affiliations":[{"raw_affiliation_string":"University of Southern California,Department of Electrical and Computer Engineering,USA","institution_ids":["https://openalex.org/I1174212"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5100752301"],"corresponding_institution_ids":["https://openalex.org/I67900169"],"apc_list":null,"apc_paid":null,"fwci":2.1561,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.87028894,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.7614842653274536},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7377285361289978},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.7325239777565002},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5886515378952026},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5846956968307495},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.5241468548774719},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.472024142742157},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4645523726940155},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4563615024089813},{"id":"https://openalex.org/keywords/integer","display_name":"Integer (computer science)","score":0.4412563145160675},{"id":"https://openalex.org/keywords/floating-point-unit","display_name":"Floating-point unit","score":0.4173751473426819},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3753969371318817},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.25107327103614807}],"concepts":[{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.7614842653274536},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7377285361289978},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.7325239777565002},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5886515378952026},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5846956968307495},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.5241468548774719},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.472024142742157},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4645523726940155},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4563615024089813},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.4412563145160675},{"id":"https://openalex.org/C110305270","wikidata":"https://www.wikidata.org/wiki/Q733507","display_name":"Floating-point unit","level":3,"score":0.4173751473426819},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3753969371318817},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.25107327103614807}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/islped58423.2023.10244431","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped58423.2023.10244431","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2347156424","https://openalex.org/W2913598954","https://openalex.org/W2946485102","https://openalex.org/W2971464131","https://openalex.org/W3006305014","https://openalex.org/W3085472313","https://openalex.org/W3091352229","https://openalex.org/W3113606433","https://openalex.org/W3131233784","https://openalex.org/W3197345780","https://openalex.org/W3216179946","https://openalex.org/W4200106037","https://openalex.org/W4280627048","https://openalex.org/W4313492155","https://openalex.org/W4379115831"],"related_works":["https://openalex.org/W2541658314","https://openalex.org/W579454177","https://openalex.org/W3215589575","https://openalex.org/W2797902698","https://openalex.org/W4200599950","https://openalex.org/W1482601373","https://openalex.org/W2908265705","https://openalex.org/W2462751277","https://openalex.org/W2159645853","https://openalex.org/W2213447204"],"abstract_inverted_index":{"As":[0],"applications":[1,72],"running":[2],"on":[3,151],"lightweight":[4,41,116],"RISC-V":[5,29,42,124,141],"processors":[6,16,102],"become":[7],"increasingly":[8],"diverse":[9],"and":[10,93,127,155],"complex,":[11],"the":[12,33,52,110,133,146,168],"need":[13],"for":[14,64,101],"multicore":[15,85,130],"supporting":[17],"floating-point":[18,80],"units":[19],"(FPUs)":[20],"is":[21,91,97,106],"riseing,":[22],"making":[23,56],"processor":[24,62,86,142],"designs":[25],"using":[26,132],"existing":[27],"open-source":[28],"cores":[30,43,46],"challenging.":[31],"With":[32],"exception":[34],"of":[35,70],"a":[36,61,84,98,128,140,160],"very":[37],"few,":[38],"most":[39,69],"open":[40],"are":[44],"integer":[45,75,125],"without":[47],"FPUs,":[48],"which":[49,96],"greatly":[50],"reduces":[51],"design":[53,60,105],"exploration":[54],"space,":[55],"it":[57,150,158,164],"impossible":[58],"to":[59,122,178],"optimized":[63],"each":[65],"application.":[66],"For":[67,82,136],"example,":[68],"these":[71],"mainly":[73],"perform":[74,79],"operations,":[76],"but":[77],"occasionally":[78],"operations.":[81],"them,":[83],"with":[87],"FPU":[88,117],"per":[89],"core":[90,126],"overkill":[92],"wastes":[94],"power,":[95],"critical":[99],"problem":[100],"where":[103],"low-power":[104,129],"paramount.":[107],"To":[108],"address":[109],"problem,":[111],"we":[112,138],"propose":[113],"an":[114,152],"external":[115],"that":[118,143,167],"can":[119,171],"be":[120],"attached":[121],"any":[123],"architecture":[131],"designed":[134,139],"FPU.":[135],"verification,":[137],"implements":[144],"all":[145],"proposed":[147,169],"technologies,":[148],"prototyped":[149],"FPGA":[153],"device,":[154],"finally":[156],"fabricated":[157],"as":[159],"System-on-Chip.":[161],"Through":[162],"experiments,":[163],"was":[165],"confirmed":[166],"technology":[170],"cut":[172],"energy":[173,175],"consumption":[174],"by":[176],"up":[177],"23%.":[179]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}