{"id":"https://openalex.org/W2971757030","doi":"https://doi.org/10.1109/islped.2019.8824834","title":"Concurrent Multipoint-to-Multipoint Communication on Interposer Channels","display_name":"Concurrent Multipoint-to-Multipoint Communication on Interposer Channels","publication_year":2019,"publication_date":"2019-07-01","ids":{"openalex":"https://openalex.org/W2971757030","doi":"https://doi.org/10.1109/islped.2019.8824834","mag":"2971757030"},"language":"en","primary_location":{"id":"doi:10.1109/islped.2019.8824834","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2019.8824834","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068575432","display_name":"Lejie Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lejie Lu","raw_affiliation_strings":["Dept. of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065315984","display_name":"Richard Afoakwa","orcid":null},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Richard Afoakwa","raw_affiliation_strings":["Dept. of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078079786","display_name":"Michael Huang","orcid":"https://orcid.org/0000-0001-9799-2920"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael Huang","raw_affiliation_strings":["Dept. of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5075199030","display_name":"Hui Wu","orcid":"https://orcid.org/0000-0002-7135-4397"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hui Wu","raw_affiliation_strings":["Dept. of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I5388228"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09198133,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interposer","display_name":"Interposer","score":0.6819042563438416},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6498392820358276},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.43419748544692993},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43230563402175903},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.41324150562286377},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3419446647167206},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13777822256088257},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.10120159387588501}],"concepts":[{"id":"https://openalex.org/C158802814","wikidata":"https://www.wikidata.org/wiki/Q6056418","display_name":"Interposer","level":4,"score":0.6819042563438416},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6498392820358276},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.43419748544692993},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43230563402175903},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.41324150562286377},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3419446647167206},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13777822256088257},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.10120159387588501},{"id":"https://openalex.org/C100460472","wikidata":"https://www.wikidata.org/wiki/Q2368605","display_name":"Etching (microfabrication)","level":3,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/islped.2019.8824834","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2019.8824834","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1955235267","https://openalex.org/W1981220134","https://openalex.org/W2039427660","https://openalex.org/W2099647775","https://openalex.org/W2123184511","https://openalex.org/W2147657366","https://openalex.org/W2148155537","https://openalex.org/W2162114684","https://openalex.org/W2169875292","https://openalex.org/W2527653927","https://openalex.org/W2563109416","https://openalex.org/W2743867045","https://openalex.org/W2752661406","https://openalex.org/W2802763776","https://openalex.org/W2883260188"],"related_works":["https://openalex.org/W2037416628","https://openalex.org/W2073725000","https://openalex.org/W2789752821","https://openalex.org/W2205502757","https://openalex.org/W2235483886","https://openalex.org/W1480508001","https://openalex.org/W2097812662","https://openalex.org/W2887648165","https://openalex.org/W1586372630","https://openalex.org/W2410100461"],"abstract_inverted_index":{"Chip-to-chip":[0],"communication":[1,226],"for":[2,98],"next":[3],"generation":[4],"computing":[5],"will":[6,80],"require":[7],"larger":[8],"bandwidth":[9,58],"density":[10],"to":[11,33,56,141,151,234],"support":[12],"ever":[13],"increasing":[14],"data":[15,116,188],"traffic":[16],"between":[17,206,208,232],"processors,":[18],"memories":[19],"and":[20,30,132,157,161,167,203],"I/O.":[21],"3-D":[22],"integration":[23],"enables":[24,125],"a":[25,146,177,187,219,224],"large":[26],"number":[27],"of":[28,190,195],"processor":[29],"memory":[31],"chips":[32],"be":[34,54],"densely":[35],"packed":[36],"on":[37,64,70,107,145],"an":[38,93],"interposer":[39,99,148],"with":[40,139,149,192],"fine-pitch":[41],"interconnect":[42],"lanes.":[43],"Advanced":[44],"signaling":[45],"techniques":[46],"such":[47,223],"as":[48],"pulse":[49],"amplitude":[50],"modulation":[51],"(PAM)":[52],"can":[53,110,185,228],"employed":[55],"improve":[57,229],"per":[59,198,215],"lane.":[60],"Most":[61],"recent":[62],"work":[63],"interposer-based":[65],"chip-to-chip":[66],"interconnects":[67],"focus":[68],"primarily":[69],"point-to-point":[71],"serial":[72],"links.":[73],"Without":[74],"adding":[75],"costly":[76],"routers,":[77],"these":[78],"designs":[79],"severely":[81],"limit":[82],"the":[83,108,127],"overall":[84,230],"system":[85,137,162,221],"level":[86],"concurrency.":[87],"In":[88],"this":[89],"paper,":[90],"we":[91],"propose":[92],"ultrahigh-speed":[94],"multipoint-to-multipoint":[95],"link":[96,109,129,168],"design":[97,124],"channels,":[100],"which":[101],"supports":[102],"PAM":[103],"signaling.":[104],"Each":[105],"node":[106,153,173],"send,":[111],"receive,":[112],"drop,":[113],"or":[114,212],"relay":[115],"at":[117,171,200],"line":[118],"rate":[119,189],"without":[120],"complex":[121],"routing.":[122],"This":[123],"splitting":[126],"physical":[128],"into":[130],"segments,":[131],"allows":[133],"multicast/broadcast.":[134],"A":[135],"proof-of-concept":[136],"prototype":[138],"up":[140,150],"16":[142],"nodes":[143,211],"integrated":[144],"silicon":[147],"22-mm":[152],"spacing":[154],"is":[155],"designed":[156],"evaluated":[158],"using":[159,176],"circuit":[160],"simulations.":[163],"The":[164,183],"PAM-4":[165],"transceiver":[166,184],"interface":[169],"circuits":[170],"each":[172],"are":[174],"implemented":[175],"standard":[178],"130-nm":[179],"SiGe":[180],"BiCMOS":[181],"technology.":[182],"achieve":[186],"40-Gb/s/lane,":[191],"channel":[193],"loss":[194],"-3.5":[196],"dB":[197],"segment":[199],"Nyquist":[201],"frequency,":[202],"energy":[204],"efficiency":[205],"1.29-pJ/b":[207],"two":[209],"neighboring":[210],"0.21-pJ/b":[213],"more":[214],"additional":[216],"nodes.":[217],"Using":[218],"cycle-level":[220],"simulation,":[222],"high-concurrency":[225],"fabric":[227],"performance":[231],"2%":[233],"18%":[235],"over":[236],"baseline.":[237]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
