{"id":"https://openalex.org/W2743867045","doi":"https://doi.org/10.1109/islped.2017.8009171","title":"Design high bandwidth-density, low latency and energy efficient on-chip interconnect","display_name":"Design high bandwidth-density, low latency and energy efficient on-chip interconnect","publication_year":2017,"publication_date":"2017-07-01","ids":{"openalex":"https://openalex.org/W2743867045","doi":"https://doi.org/10.1109/islped.2017.8009171","mag":"2743867045"},"language":"en","primary_location":{"id":"doi:10.1109/islped.2017.8009171","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2017.8009171","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090943905","display_name":"Yong Wang","orcid":"https://orcid.org/0000-0002-6068-7161"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Yong Wang","raw_affiliation_strings":["Department of Electrical and Computer Engineering University of Rochester, Rochester, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5075199030","display_name":"Hui Wu","orcid":"https://orcid.org/0000-0002-7135-4397"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hui Wu","raw_affiliation_strings":["Department of Electrical and Computer Engineering University of Rochester, Rochester, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering University of Rochester, Rochester, NY, USA","institution_ids":["https://openalex.org/I5388228"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5090943905"],"corresponding_institution_ids":["https://openalex.org/I5388228"],"apc_list":null,"apc_paid":null,"fwci":0.8288,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.76627108,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.645847499370575},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6257684826850891},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.559026300907135},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4978349208831787},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4531557559967041},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4324605464935303},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3861289620399475},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.18127325177192688},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14046066999435425}],"concepts":[{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.645847499370575},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6257684826850891},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.559026300907135},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4978349208831787},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4531557559967041},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4324605464935303},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3861289620399475},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.18127325177192688},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14046066999435425}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/islped.2017.8009171","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2017.8009171","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W10143836","https://openalex.org/W1494277491","https://openalex.org/W1570391545","https://openalex.org/W1965976265","https://openalex.org/W1970734438","https://openalex.org/W1983033281","https://openalex.org/W1992822815","https://openalex.org/W1994875768","https://openalex.org/W2018960859","https://openalex.org/W2022035810","https://openalex.org/W2025177582","https://openalex.org/W2027362575","https://openalex.org/W2044674552","https://openalex.org/W2046482750","https://openalex.org/W2099571807","https://openalex.org/W2099647775","https://openalex.org/W2103692532","https://openalex.org/W2104452403","https://openalex.org/W2127106231","https://openalex.org/W2148155537","https://openalex.org/W2163544529","https://openalex.org/W2180378519","https://openalex.org/W2291503793","https://openalex.org/W2332091857","https://openalex.org/W3005800476","https://openalex.org/W3144686578","https://openalex.org/W6648948429","https://openalex.org/W6661758699"],"related_works":["https://openalex.org/W2155019192","https://openalex.org/W2014709025","https://openalex.org/W4249035840","https://openalex.org/W2766970861","https://openalex.org/W3125341812","https://openalex.org/W2018755015","https://openalex.org/W2065289416","https://openalex.org/W2017236304","https://openalex.org/W2115579119","https://openalex.org/W2136854845"],"abstract_inverted_index":{"For":[0],"future":[1],"high-performance":[2],"computing":[3],"chips,":[4],"on-chip":[5,31,39],"interconnect":[6],"requires":[7],"large":[8,112],"bandwidth-density,":[9],"low":[10],"latency,":[11],"and":[12,48],"high":[13],"energy-efficiency,":[14],"which":[15,97,173],"pose":[16],"significant":[17],"design":[18,24],"challenges.":[19],"This":[20],"paper":[21],"presents":[22],"a":[23,164],"space":[25],"exploration":[26],"of":[27,38,78,110,123],"transmission":[28,40,72],"line":[29,73],"based":[30,88],"interconnect.":[32],"First,":[33],"we":[34],"conduct":[35],"an":[36],"optimization":[37],"lines":[41],"to":[42,52,83,100,135,180],"minimize":[43],"the":[44,54,58,71,102,111,137],"size,":[45],"channel":[46,76,79,104,114],"loss":[47],"inter-symbol-interference":[49],"(ISI),":[50],"hence":[51],"maximize":[53],"bandwidth-density.":[55],"Based":[56],"on":[57,89],"result,":[59],"differential":[60],"coplanar":[61],"waveguide":[62],"(CPW)":[63],"with":[64],"55-\u03bcm":[65],"pitch":[66],"size":[67],"is":[68,120,132,170,174],"chosen":[69],"as":[70],"topology.":[74],"Next,":[75],"capacities":[77],"lengths":[80],"from":[81],"2":[82],"8":[84],"cm":[85],"are":[86,95,98,150],"characterized":[87],"time-domain":[90],"pulse":[91,116],"responses.":[92],"Various":[93],"equalizers":[94],"studied,":[96],"used":[99],"increase":[101],"ISI-limited":[103],"capacity.":[105],"To":[106,144],"make":[107],"better":[108],"use":[109],"equalized":[113],"capacity,":[115],"amplitude":[117],"modulation":[118,139],"(PAM)":[119],"employed":[121],"instead":[122],"traditional":[124],"non-return-to-zero":[125],"(NRZ)":[126],"signaling.":[127],"A":[128],"link":[129],"budget":[130],"analysis":[131],"then":[133],"conducted":[134],"find":[136],"optimal":[138],"format":[140],"for":[141],"each":[142],"channel.":[143,166],"verify":[145],"our":[146],"analyses,":[147],"several":[148],"transceivers":[149],"designed":[151],"in":[152],"28-nm":[153],"CMOS":[154],"technology.":[155],"An":[156],"84-Gb/s":[157],"PAM-8":[158],"transceiver":[159],"achieves":[160],"1.5-Gb/s/\u03bcm":[161],"bandwidth-density":[162,169],"over":[163],"4-cm":[165],"The":[167],"unrepeated":[168],"6.1":[171],"Gb/s/\u03bcm\u00b7cm,":[172],"almost":[175],"10":[176],"times":[177],"larger":[178],"compared":[179],"prior":[181],"work.":[182]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
