{"id":"https://openalex.org/W1679776235","doi":"https://doi.org/10.1109/islped.2015.7273542","title":"Power management in the Intel Xeon E5 v3","display_name":"Power management in the Intel Xeon E5 v3","publication_year":2015,"publication_date":"2015-07-01","ids":{"openalex":"https://openalex.org/W1679776235","doi":"https://doi.org/10.1109/islped.2015.7273542","mag":"1679776235"},"language":"en","primary_location":{"id":"doi:10.1109/islped.2015.7273542","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2015.7273542","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031873224","display_name":"Ankush Varma","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":true,"raw_author_name":"Ankush Varma","raw_affiliation_strings":["Intel Inc","Intel Inc., Santa Clara, California, United States"],"affiliations":[{"raw_affiliation_string":"Intel Inc","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Inc., Santa Clara, California, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005035025","display_name":"Bill Bowhill","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Bill Bowhill","raw_affiliation_strings":["Intel Inc","Intel Inc., Santa Clara, California, United States"],"affiliations":[{"raw_affiliation_string":"Intel Inc","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Inc., Santa Clara, California, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049223858","display_name":"Jason Crop","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Jason Crop","raw_affiliation_strings":["Intel Inc","Intel Inc., Santa Clara, California, United States"],"affiliations":[{"raw_affiliation_string":"Intel Inc","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Inc., Santa Clara, California, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064473586","display_name":"Corey Gough","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Corey Gough","raw_affiliation_strings":["Intel Inc","Intel Inc., Santa Clara, California, United States"],"affiliations":[{"raw_affiliation_string":"Intel Inc","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Inc., Santa Clara, California, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022728650","display_name":"Brian J Griffith","orcid":"https://orcid.org/0000-0002-9415-7716"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Brian Griffith","raw_affiliation_strings":["Intel Inc","Intel Inc., Santa Clara, California, United States"],"affiliations":[{"raw_affiliation_string":"Intel Inc","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Inc., Santa Clara, California, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053349871","display_name":"Dan Kingsley","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Dan Kingsley","raw_affiliation_strings":["Intel Inc","Intel Inc., Santa Clara, California, United States"],"affiliations":[{"raw_affiliation_string":"Intel Inc","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Inc., Santa Clara, California, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080705183","display_name":"Krishna Sistla","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Krishna Sistla","raw_affiliation_strings":["Intel Inc","Intel Inc., Santa Clara, California, United States"],"affiliations":[{"raw_affiliation_string":"Intel Inc","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel Inc., Santa Clara, California, United States","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5031873224"],"corresponding_institution_ids":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"],"apc_list":null,"apc_paid":null,"fwci":1.9379,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.85248265,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"371","last_page":"376"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/x86","display_name":"x86","score":0.8720360398292542},{"id":"https://openalex.org/keywords/xeon","display_name":"Xeon","score":0.8133357167243958},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6828920841217041},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.676543116569519},{"id":"https://openalex.org/keywords/power-management","display_name":"Power management","score":0.6048685312271118},{"id":"https://openalex.org/keywords/xeon-phi","display_name":"Xeon Phi","score":0.5979626178741455},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5627275705337524},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.49698618054389954},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.49096015095710754},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4606049656867981},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.42146626114845276},{"id":"https://openalex.org/keywords/granularity","display_name":"Granularity","score":0.4124354124069214},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.1355726718902588}],"concepts":[{"id":"https://openalex.org/C170723468","wikidata":"https://www.wikidata.org/wiki/Q182933","display_name":"x86","level":3,"score":0.8720360398292542},{"id":"https://openalex.org/C145108525","wikidata":"https://www.wikidata.org/wiki/Q656154","display_name":"Xeon","level":2,"score":0.8133357167243958},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6828920841217041},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.676543116569519},{"id":"https://openalex.org/C2778774385","wikidata":"https://www.wikidata.org/wiki/Q4437810","display_name":"Power management","level":3,"score":0.6048685312271118},{"id":"https://openalex.org/C96972482","wikidata":"https://www.wikidata.org/wiki/Q1049168","display_name":"Xeon Phi","level":2,"score":0.5979626178741455},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5627275705337524},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.49698618054389954},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.49096015095710754},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4606049656867981},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.42146626114845276},{"id":"https://openalex.org/C177774035","wikidata":"https://www.wikidata.org/wiki/Q1246948","display_name":"Granularity","level":2,"score":0.4124354124069214},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.1355726718902588},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/islped.2015.7273542","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2015.7273542","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8100000023841858}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1971575710","https://openalex.org/W1990884219","https://openalex.org/W1991991600","https://openalex.org/W2018960859","https://openalex.org/W2162517322","https://openalex.org/W2166716750","https://openalex.org/W6683806362"],"related_works":["https://openalex.org/W2753965283","https://openalex.org/W2740999212","https://openalex.org/W2188971969","https://openalex.org/W1994052277","https://openalex.org/W2024554511","https://openalex.org/W2588843388","https://openalex.org/W3042238487","https://openalex.org/W2599563411","https://openalex.org/W1964236241","https://openalex.org/W2885985254"],"abstract_inverted_index":{"The":[0,111],"Intel":[1],"Xeon":[2,13,112],"E5":[3,113],"v3":[4,114],"family":[5,115],"is":[6,35,50],"the":[7,36,64,93,129,137,152],"latest":[8],"generation":[9,145],"of":[10,97,128,142,146],"enterprise-grade,":[11],"high-performance,":[12],"microprocessors.":[14],"It":[15,34],"implements":[16],"several":[17],"new":[18,119,144],"power-management":[19],"technologies":[20],"and":[21,30,85,95,108,133,140],"features":[22],"aimed":[23],"at":[24,68,81],"improving":[25,31],"power/performance":[26,153],"efficiency,":[27],"increasing":[28],"performance,":[29],"power":[32,88],"delivery.":[33],"first":[37],"commercial":[38],"x86":[39],"processor":[40,65],"to":[41,66,79],"manage":[42],"voltage/frequency":[43],"optimizations":[44],"on":[45,63,101],"a":[46,69,82,118],"per-core":[47,57,73],"granularity.":[48],"This":[49,124],"done":[51],"by":[52],"combining":[53],"a)":[54],"fine-grained":[55],"on-die":[56,106],"voltage":[58,96],"regulators,":[59],"enabling":[60,76],"every":[61],"core":[62,78,99],"run":[67,80],"different":[70,83],"voltage,":[71],"b)":[72],"clock":[74],"management,":[75],"each":[77,98],"frequency,":[84],"c)":[86],"advanced":[87],"management":[89,122],"algorithms":[90],"for":[91,156],"optimizing":[92],"frequency":[94],"based":[100],"OS":[102],"requests,":[103],"system":[104],"utilization,":[105],"sensors,":[107],"silicon":[109],"characteristics.":[110],"also":[116],"introduces":[117],"maximum-power-draw":[120],"(Pmax)":[121],"approach.":[123],"paper":[125],"describes":[126],"some":[127],"technical":[130],"challenges,":[131],"solutions,":[132],"lessons":[134],"learned":[135],"during":[136],"architecture,":[138,148],"design,":[139],"productization":[141],"this":[143],"microprocessor":[147],"as":[149,151],"well":[150],"improvements":[154],"measured":[155],"server":[157],"workloads.":[158]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
