{"id":"https://openalex.org/W1636028932","doi":"https://doi.org/10.1109/islped.2015.7273493","title":"Design of fine-grained sequential approximate circuits using probability-aware fault emulation","display_name":"Design of fine-grained sequential approximate circuits using probability-aware fault emulation","publication_year":2015,"publication_date":"2015-07-01","ids":{"openalex":"https://openalex.org/W1636028932","doi":"https://doi.org/10.1109/islped.2015.7273493","mag":"1636028932"},"language":"en","primary_location":{"id":"doi:10.1109/islped.2015.7273493","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2015.7273493","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010194320","display_name":"David May","orcid":null},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"David May","raw_affiliation_strings":["Technische Universitat Mtinchen, Munchen, Germany","Technische Universit\u00e4t M\u00fcnchen, 80333, Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universitat Mtinchen, Munchen, Germany","institution_ids":[]},{"raw_affiliation_string":"Technische Universit\u00e4t M\u00fcnchen, 80333, Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005732789","display_name":"Walter Stechele","orcid":"https://orcid.org/0000-0002-7455-8483"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Walter Stechele","raw_affiliation_strings":["Technische Universitat Munchen, Munchen, Bayern, DE","Technische Universit\u00e4t M\u00fcnchen, 80333, Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universitat Munchen, Munchen, Bayern, DE","institution_ids":[]},{"raw_affiliation_string":"Technische Universit\u00e4t M\u00fcnchen, 80333, Germany","institution_ids":["https://openalex.org/I62916508"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5010194320"],"corresponding_institution_ids":["https://openalex.org/I62916508"],"apc_list":null,"apc_paid":null,"fwci":0.3946,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.65546575,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"81","issue":null,"first_page":"73","last_page":"78"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7713032364845276},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.7336740493774414},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6105913519859314},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5195130109786987},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5109331011772156},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4557861387729645},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.45328548550605774},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.43097251653671265},{"id":"https://openalex.org/keywords/hardware-emulation","display_name":"Hardware emulation","score":0.4185773730278015},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.41489699482917786},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.38370445370674133},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.37864285707473755},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3615994155406952},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.29387882351875305},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10408028960227966},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09951001405715942}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7713032364845276},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.7336740493774414},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6105913519859314},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5195130109786987},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5109331011772156},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4557861387729645},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.45328548550605774},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.43097251653671265},{"id":"https://openalex.org/C94115699","wikidata":"https://www.wikidata.org/wiki/Q5656406","display_name":"Hardware emulation","level":3,"score":0.4185773730278015},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.41489699482917786},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.38370445370674133},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.37864285707473755},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3615994155406952},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.29387882351875305},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10408028960227966},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09951001405715942},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/islped.2015.7273493","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2015.7273493","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1988290377","https://openalex.org/W2020217519","https://openalex.org/W2035236061","https://openalex.org/W2035974948","https://openalex.org/W2045294186","https://openalex.org/W2059557268","https://openalex.org/W2065024298","https://openalex.org/W2082738287","https://openalex.org/W2088175963","https://openalex.org/W2096311643","https://openalex.org/W2100098458","https://openalex.org/W2104578404","https://openalex.org/W2106360508","https://openalex.org/W2109233612","https://openalex.org/W2140145164","https://openalex.org/W2143283746","https://openalex.org/W2183529453","https://openalex.org/W3141620748","https://openalex.org/W3143757450","https://openalex.org/W3147234326","https://openalex.org/W3149572347","https://openalex.org/W4231091214","https://openalex.org/W4240237526","https://openalex.org/W4243410967","https://openalex.org/W4247892942","https://openalex.org/W6647363498","https://openalex.org/W6676258682","https://openalex.org/W6686184986"],"related_works":["https://openalex.org/W29481652","https://openalex.org/W2069145203","https://openalex.org/W2085176210","https://openalex.org/W1702800398","https://openalex.org/W2106889348","https://openalex.org/W2083793411","https://openalex.org/W2135500595","https://openalex.org/W2543766998","https://openalex.org/W573124066","https://openalex.org/W1969171031"],"abstract_inverted_index":{"Approximate":[0],"Computing":[1],"has":[2,86],"recently":[3],"drawn":[4],"interest":[5],"due":[6,73],"to":[7,10,74,78,87,92,97,103,118,134,148,175,181,197,203,209],"its":[8],"promise":[9],"substantially":[11],"decrease":[12],"the":[13,28,42,65,144,156,159,182,200,204,211,215],"power":[14],"consumption":[15],"of":[16,41,143,214],"integrated":[17],"circuits.":[18,169,179],"By":[19],"tolerating":[20],"a":[21,25,34,94,106],"certain":[22],"imprecision":[23],"at":[24,33,50],"circuit":[26,29,43,95,145,161],"output,":[27],"can":[30],"be":[31,45,88],"operated":[32],"more":[35],"resource-saving":[36],"state.":[37],"For":[38],"instance,":[39],"parts":[40],"could":[44],"switched":[46],"off":[47],"or":[48],"driven":[49],"sub-threshold":[51],"voltage.":[52],"Clearly,":[53],"not":[54,102],"all":[55],"applications":[56,63],"are":[57,71,114,138],"suitable":[58],"for":[59,82],"this":[60,111],"approach.":[61],"Especially":[62],"from":[64,122,129],"signal":[66],"and":[67,96,190],"image":[68],"processing":[69],"domain":[70],"applicable,":[72],"their":[75],"intrinsic":[76],"tolerance":[77],"imprecision.":[79],"But":[80],"even":[81],"these":[83],"circuits,":[84],"one":[85],"very":[89,188],"careful":[90],"where":[91],"approximate":[93,120,176],"what":[98],"extent,":[99],"in":[100,146,155,207],"order":[101,147,208],"fall":[104],"below":[105],"minimum":[107],"required":[108,205],"QoS.":[109],"In":[110],"paper":[112],"we":[113],"presenting":[115],"an":[116],"approach":[117,186],"generate":[119],"circuits":[121],"existing":[123,164],"deterministic":[124],"implementations.":[125],"The":[126],"flow":[127],"reaches":[128],"application-driven":[130],"QoS":[131],"definition":[132],"down":[133],"approximated":[135],"RTL.":[136],"We":[137],"employing":[139],"FPGA-based":[140,183],"fault":[141],"emulation":[142],"find":[149],"out":[150,213],"how":[151],"faults,":[152],"i.e.":[153],"imprecisions":[154],"circuit,":[157],"affect":[158],"overall":[160],"behavior.":[162],"Most":[163],"approaches":[165],"only":[166],"consider":[167],"combinational":[168],"Our":[170],"proposed":[171],"methodology":[172],"is":[173,187],"able":[174],"complete":[177],"sequential":[178],"Due":[180],"emulation,":[184],"our":[185],"fast":[189],"accurate.":[191],"And":[192],"furthermore,":[193],"it":[194],"allows":[195],"us":[196],"fine-granular":[198],"tune":[199],"resulting":[201],"precision":[202],"QoS,":[206],"get":[210],"most":[212],"approximation.":[216]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}