{"id":"https://openalex.org/W4245076358","doi":"https://doi.org/10.1109/islped.2013.6629312","title":"Page policy control with memory partitioning for DRAM performance and power efficiency","display_name":"Page policy control with memory partitioning for DRAM performance and power efficiency","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W4245076358","doi":"https://doi.org/10.1109/islped.2013.6629312"},"language":"en","primary_location":{"id":"doi:10.1109/islped.2013.6629312","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2013.6629312","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065925903","display_name":"Mingli Xie","orcid":null},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Mingli Xie","raw_affiliation_strings":["Microprocessor Research and Development Center, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Microprocessor Research and Development Center, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101758077","display_name":"Dong Tong","orcid":"https://orcid.org/0000-0003-0987-6351"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dong Tong","raw_affiliation_strings":["Microprocessor Research and Development Center, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Microprocessor Research and Development Center, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112306128","display_name":"Yi Feng","orcid":"https://orcid.org/0009-0004-0397-8423"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yi Feng","raw_affiliation_strings":["Microprocessor Research and Development Center, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Microprocessor Research and Development Center, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045005999","display_name":"Kan Huang","orcid":"https://orcid.org/0000-0003-0814-3121"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kan Huang","raw_affiliation_strings":["Microprocessor Research and Development Center, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Microprocessor Research and Development Center, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100691552","display_name":"Xu Cheng","orcid":"https://orcid.org/0000-0002-5544-8852"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xu Cheng","raw_affiliation_strings":["Microprocessor Research and Development Center, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Microprocessor Research and Development Center, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5065925903"],"corresponding_institution_ids":["https://openalex.org/I20231570"],"apc_list":null,"apc_paid":null,"fwci":1.12314062,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.83135995,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"298","last_page":"303"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.9184681177139282},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7788535356521606},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.5674483776092529},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.4913405478000641},{"id":"https://openalex.org/keywords/performance-improvement","display_name":"Performance improvement","score":0.47012412548065186},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.4646906852722168},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44300898909568787},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.44117075204849243},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4271649718284607},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.31444287300109863},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2931079864501953},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2517937421798706},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.12022331357002258},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11030998826026917},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.08126378059387207}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.9184681177139282},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7788535356521606},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.5674483776092529},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.4913405478000641},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.47012412548065186},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.4646906852722168},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44300898909568787},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.44117075204849243},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4271649718284607},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.31444287300109863},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2931079864501953},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2517937421798706},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.12022331357002258},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11030998826026917},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.08126378059387207},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/islped.2013.6629312","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2013.6629312","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1753788805","https://openalex.org/W1964316448","https://openalex.org/W1979866689","https://openalex.org/W1987912519","https://openalex.org/W2012623042","https://openalex.org/W2026517532","https://openalex.org/W2056200836","https://openalex.org/W2072753794","https://openalex.org/W2102871765","https://openalex.org/W2110860124","https://openalex.org/W2115172404","https://openalex.org/W2124237318","https://openalex.org/W2129513794","https://openalex.org/W2132269953","https://openalex.org/W2139717179","https://openalex.org/W2140980291","https://openalex.org/W2142875853","https://openalex.org/W2147657366","https://openalex.org/W2149087426","https://openalex.org/W2159908132","https://openalex.org/W2162639668","https://openalex.org/W3145624740","https://openalex.org/W4236312724","https://openalex.org/W4236382111","https://openalex.org/W4242758709","https://openalex.org/W4244591065","https://openalex.org/W6637907863","https://openalex.org/W6641191176","https://openalex.org/W6645269501","https://openalex.org/W6677264922","https://openalex.org/W6681039078"],"related_works":["https://openalex.org/W1976244802","https://openalex.org/W4293430534","https://openalex.org/W2335743642","https://openalex.org/W4297812927","https://openalex.org/W2800412005","https://openalex.org/W2122646225","https://openalex.org/W3140615508","https://openalex.org/W2029945810","https://openalex.org/W1954780666","https://openalex.org/W4320351610"],"abstract_inverted_index":{"DRAM":[0,36,54,87,104],"performance":[1,24,55,88,100],"and":[2,17,89,101],"power":[3,37,58,90,105],"efficiency":[4],"considerations":[5],"are":[6],"becoming":[7],"increasingly":[8],"important.":[9],"Bank":[10],"partitioning":[11,84],"partitions":[12],"memory":[13,27,74],"banks":[14],"among":[15],"cores":[16],"eliminates":[18],"inter-thread":[19],"interference,":[20],"thus":[21],"improving":[22],"system":[23,99],"of":[25,49],"shared":[26],"CMP":[28],"systems.":[29],"However,":[30],"it":[31],"doesn't":[32],"take":[33],"into":[34],"account":[35],"consumption.":[38,59,91],"We":[39],"propose":[40,80],"an":[41,77],"application-aware":[42],"page":[43,50,67],"policy,":[44],"which":[45],"exploits":[46],"potential":[47],"benefits":[48],"policy":[51,68],"to":[52,64,69,72,85],"optimize":[53],"or":[56],"minimize":[57],"The":[60],"key":[61],"idea":[62],"is":[63],"dynamically":[65],"assign":[66],"applications":[70],"according":[71],"their":[73],"characteristics.":[75],"As":[76],"improvement,":[78],"we":[79],"a":[81],"power-aware":[82],"bank":[83],"balance":[86],"Experimental":[92],"results":[93],"show":[94],"that":[95],"our":[96],"proposal":[97],"increases":[98],"significantly":[102],"improves":[103],"efficiency.":[106]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}