{"id":"https://openalex.org/W4251016701","doi":"https://doi.org/10.1109/islped.2013.6629267","title":"SRAM cell optimization for low AV<inf>T</inf> transistors","display_name":"SRAM cell optimization for low AV<inf>T</inf> transistors","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W4251016701","doi":"https://doi.org/10.1109/islped.2013.6629267"},"language":"en","primary_location":{"id":"doi:10.1109/islped.2013.6629267","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2013.6629267","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015329523","display_name":"Lawrence T. Clark","orcid":"https://orcid.org/0000-0001-7741-6512"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Lawrence T. Clark","raw_affiliation_strings":["SuVolta, Inc., Los Gatos, CA, USA"],"affiliations":[{"raw_affiliation_string":"SuVolta, Inc., Los Gatos, CA, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108210173","display_name":"Samuel Leshner","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Samuel Leshner","raw_affiliation_strings":["SuVolta, Inc., Los Gatos, CA, USA"],"affiliations":[{"raw_affiliation_string":"SuVolta, Inc., Los Gatos, CA, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009686282","display_name":"George Tien","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"George Tien","raw_affiliation_strings":["SuVolta, Inc., Los Gatos, CA, USA"],"affiliations":[{"raw_affiliation_string":"SuVolta, Inc., Los Gatos, CA, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5015329523"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.38344858,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"57","last_page":"63"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8067843914031982},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6336657404899597},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.5194089412689209},{"id":"https://openalex.org/keywords/design-of-experiments","display_name":"Design of experiments","score":0.5016705989837646},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5013406276702881},{"id":"https://openalex.org/keywords/matching","display_name":"Matching (statistics)","score":0.44196510314941406},{"id":"https://openalex.org/keywords/factorial-experiment","display_name":"Factorial experiment","score":0.42768755555152893},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3408251404762268},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2696547210216522},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21898826956748962},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.21446609497070312},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.20521515607833862},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19837230443954468},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.08822062611579895}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8067843914031982},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6336657404899597},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.5194089412689209},{"id":"https://openalex.org/C34559072","wikidata":"https://www.wikidata.org/wiki/Q2334061","display_name":"Design of experiments","level":2,"score":0.5016705989837646},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5013406276702881},{"id":"https://openalex.org/C165064840","wikidata":"https://www.wikidata.org/wiki/Q1321061","display_name":"Matching (statistics)","level":2,"score":0.44196510314941406},{"id":"https://openalex.org/C169222746","wikidata":"https://www.wikidata.org/wiki/Q4116558","display_name":"Factorial experiment","level":2,"score":0.42768755555152893},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3408251404762268},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2696547210216522},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21898826956748962},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.21446609497070312},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.20521515607833862},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19837230443954468},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.08822062611579895},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/islped.2013.6629267","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2013.6629267","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1945187117","https://openalex.org/W2002612140","https://openalex.org/W2015428081","https://openalex.org/W2070767174","https://openalex.org/W2116766520","https://openalex.org/W2119300509","https://openalex.org/W2120353978","https://openalex.org/W2130282462","https://openalex.org/W2140823559","https://openalex.org/W2141274564","https://openalex.org/W2154477062","https://openalex.org/W2738825487","https://openalex.org/W3143794633","https://openalex.org/W4238450125","https://openalex.org/W4301283990","https://openalex.org/W6677705767"],"related_works":["https://openalex.org/W3033927325","https://openalex.org/W2908107136","https://openalex.org/W2024402881","https://openalex.org/W4205438635","https://openalex.org/W2901020484","https://openalex.org/W2764230554","https://openalex.org/W2945855118","https://openalex.org/W2548945335","https://openalex.org/W2787622611","https://openalex.org/W1967114272"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"describe":[4,30],"a":[5,67,100,109],"six-transistor":[6],"static":[7],"random":[8],"access":[9],"memory":[10],"(SRAM)":[11],"cell":[12],"optimization":[13,89],"methodology":[14],"for":[15],"transistors":[16,37],"with":[17,24],"significantly":[18],"improved":[19,44,55],"matching,":[20],"while":[21],"maintaining":[22],"compatibility":[23],"the":[25,31,73,76],"baseline":[26],"design.":[27],"We":[28],"briefly":[29],"reduced":[32],"AV":[33],"T":[36],"and":[38,54,90,96],"show":[39],"that":[40],"they":[41],"allow":[42,88],"substantially":[43],"minimum":[45],"SRAM":[46],"operating":[47],"voltage":[48],"(V":[49],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">min":[52],")":[53],"array":[56],"leakage.":[57],"Using":[58],"an":[59],"efficient":[60,83],"design":[61],"of":[62,75],"experiments":[63],"(DOE)":[64],"factorial":[65],"as":[66,103,105],"pseudo-Monte":[68],"Carlo":[69],"generator,":[70],"points":[71],"on":[72,99,108],"tail":[74],"distribution":[77],"are":[78,112],"directly":[79],"simulated.":[80],"The":[81],"highly":[82],"method":[84],"is":[85],"shown":[86],"to":[87],"`what":[91],"if'":[92],"scenario":[93],"investigations.":[94],"Simulation":[95],"silicon":[97],"results":[98,107],"65-nm":[101],"process":[102,111],"well":[104],"simulation":[106],"28-nm":[110],"shown.":[113]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}