{"id":"https://openalex.org/W4239441111","doi":"https://doi.org/10.1109/islped.2013.6629259","title":"An energy efficient GPGPU memory hierarchy with tiny incoherent caches","display_name":"An energy efficient GPGPU memory hierarchy with tiny incoherent caches","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W4239441111","doi":"https://doi.org/10.1109/islped.2013.6629259"},"language":"en","primary_location":{"id":"doi:10.1109/islped.2013.6629259","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2013.6629259","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027781973","display_name":"Alamelu Sankaranarayanan","orcid":null},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Alamelu Sankaranarayanan","raw_affiliation_strings":["Department of Computer Engineering, University of California, Santa Cruz, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of California, Santa Cruz, USA","institution_ids":["https://openalex.org/I185103710"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112622151","display_name":"Ehsan K. Ardestani","orcid":null},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ehsan K. Ardestani","raw_affiliation_strings":["Department of Computer Engineering, University of California, Santa Cruz, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of California, Santa Cruz, USA","institution_ids":["https://openalex.org/I185103710"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037072695","display_name":"Jos\u00e9 Luis Briz","orcid":"https://orcid.org/0000-0001-5940-9837"},"institutions":[{"id":"https://openalex.org/I255234318","display_name":"Universidad de Zaragoza","ror":"https://ror.org/012a91z28","country_code":"ES","type":"education","lineage":["https://openalex.org/I255234318"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Jose Luis Briz","raw_affiliation_strings":["Universidad de Zaragoza, Zaragoza, Arag\u00c3\u00b3n, ES"],"affiliations":[{"raw_affiliation_string":"Universidad de Zaragoza, Zaragoza, Arag\u00c3\u00b3n, ES","institution_ids":["https://openalex.org/I255234318"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065936105","display_name":"Jose Renau","orcid":"https://orcid.org/0000-0001-5128-0506"},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jose Renau","raw_affiliation_strings":["Department of Computer Engineering, University of California, Santa Cruz, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of California, Santa Cruz, USA","institution_ids":["https://openalex.org/I185103710"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5027781973"],"corresponding_institution_ids":["https://openalex.org/I185103710"],"apc_list":null,"apc_paid":null,"fwci":1.2608,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.82198018,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7961869239807129},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.7191506028175354},{"id":"https://openalex.org/keywords/general-purpose-computing-on-graphics-processing-units","display_name":"General-purpose computing on graphics processing units","score":0.6659833788871765},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6453039646148682},{"id":"https://openalex.org/keywords/hierarchy","display_name":"Hierarchy","score":0.5569121837615967},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3970499634742737},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.14199110865592957},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.13786956667900085},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10087373852729797}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7961869239807129},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.7191506028175354},{"id":"https://openalex.org/C50630238","wikidata":"https://www.wikidata.org/wiki/Q971505","display_name":"General-purpose computing on graphics processing units","level":3,"score":0.6659833788871765},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6453039646148682},{"id":"https://openalex.org/C31170391","wikidata":"https://www.wikidata.org/wiki/Q188619","display_name":"Hierarchy","level":2,"score":0.5569121837615967},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3970499634742737},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.14199110865592957},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.13786956667900085},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10087373852729797},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C34447519","wikidata":"https://www.wikidata.org/wiki/Q179522","display_name":"Market economy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/islped.2013.6629259","is_oa":false,"landing_page_url":"https://doi.org/10.1109/islped.2013.6629259","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Symposium on Low Power Electronics and Design (ISLPED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1971294584","https://openalex.org/W1979527452","https://openalex.org/W2011784341","https://openalex.org/W2022632182","https://openalex.org/W2024122052","https://openalex.org/W2080592089","https://openalex.org/W2084110734","https://openalex.org/W2092340922","https://openalex.org/W2096661534","https://openalex.org/W2100011668","https://openalex.org/W2103742924","https://openalex.org/W2127945400","https://openalex.org/W2139427807","https://openalex.org/W2150073849","https://openalex.org/W2273440736","https://openalex.org/W4231070018","https://openalex.org/W4250613128","https://openalex.org/W6694513646"],"related_works":["https://openalex.org/W2489934651","https://openalex.org/W1980160788","https://openalex.org/W108401543","https://openalex.org/W2279642117","https://openalex.org/W4300190729","https://openalex.org/W2953056293","https://openalex.org/W2128546436","https://openalex.org/W2035037799","https://openalex.org/W1971123707","https://openalex.org/W4200143910"],"abstract_inverted_index":{"With":[0],"progressive":[1],"generations":[2],"and":[3,17,36,118,197,225],"the":[4,19,37,43,56,119,130,147,167,195,213,219],"ever-increasing":[5],"promise":[6],"of":[7,45,59,99,101,151,154,156,166,184,200],"computing":[8],"power,":[9],"GPGPUs":[10],"have":[11],"been":[12],"quickly":[13],"growing":[14],"in":[15,76,115,132,212,231],"size,":[16],"at":[18],"same":[20],"time,":[21],"energy":[22,52,210],"consumption":[23],"has":[24],"become":[25,90],"a":[26,46,72,95,136,208],"major":[27],"bottleneck":[28],"for":[29,94,221],"them.":[30],"The":[31],"first":[32,120],"level":[33,121],"data":[34,122],"cache":[35,73,85,123,143],"scratchpad":[38,201],"memory":[39,185,202,215,223],"are":[40,50],"critical":[41],"to":[42,55,63,171,180,191,206],"performance":[44],"GPGPU,":[47],"but":[48,82],"they":[49,61],"extremely":[51],"inefficient":[53],"due":[54],"large":[57],"number":[58],"cores":[60],"need":[62,190],"serve.":[64],"This":[65,176],"problem":[66],"could":[67],"be":[68,192],"mitigated":[69],"by":[70,128,194],"introducing":[71],"higher":[74],"up":[75],"hierarchy":[77],"that":[78,88,124,187,227],"services":[79],"fewer":[80],"cores,":[81],"this":[83,105,139],"introduces":[84],"coherency":[86],"issues":[87],"may":[89],"very":[91],"significant,":[92],"especially":[93],"GPGPU":[96],"with":[97],"hundreds":[98,153],"thousands":[100,155],"in-flight":[102],"threads.":[103,157],"In":[104,135],"paper,":[106],"we":[107],"propose":[108],"adding":[109],"incoherent":[110,159],"tinyCaches":[111],"between":[112,145],"each":[113],"lane":[114],"an":[116,133],"SM,":[117],"is":[125,178,229],"currently":[126],"shared":[127],"all":[129,146],"lanes":[131,149],"SM.":[134],"normal":[137],"multiprocessor,":[138],"would":[140,188],"require":[141],"hardware":[142],"coherence":[144,174],"SM":[148],"capable":[150],"handling":[152],"Our":[158],"tinyCache":[160,177,220],"architecture":[161],"exploits":[162],"certain":[163],"unique":[164],"features":[165],"CUDA/OpenCL":[168],"programming":[169],"model":[170],"avoid":[172],"complex":[173],"schemes.":[175],"able":[179],"filter":[181],"out":[182],"62%":[183],"requests":[186],"otherwise":[189],"serviced":[193],"DL1G,":[196],"almost":[198],"81%":[199],"requests,":[203],"allowing":[204],"us":[205],"achieve":[207],"37%":[209],"reduction":[211],"on-chip":[214],"hierarchy.":[216],"We":[217],"evaluate":[218],"different":[222],"patterns":[224],"show":[226],"it":[228],"beneficial":[230],"most":[232],"cases.":[233]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}