{"id":"https://openalex.org/W2742610696","doi":"https://doi.org/10.1109/isie.2017.8001307","title":"A digital PWM controlled KY step-up converter based on frequency domain \u03a3\u0394 ADC","display_name":"A digital PWM controlled KY step-up converter based on frequency domain \u03a3\u0394 ADC","publication_year":2017,"publication_date":"2017-06-01","ids":{"openalex":"https://openalex.org/W2742610696","doi":"https://doi.org/10.1109/isie.2017.8001307","mag":"2742610696"},"language":"en","primary_location":{"id":"doi:10.1109/isie.2017.8001307","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isie.2017.8001307","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 26th International Symposium on Industrial Electronics (ISIE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022975807","display_name":"Xia Du","orcid":null},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":true,"raw_author_name":"Xia Du","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043052453","display_name":"Chi\u2010Seng Lam","orcid":"https://orcid.org/0000-0003-3669-6743"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Chi-Seng Lam","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073702117","display_name":"Sai\u2010Weng Sin","orcid":"https://orcid.org/0000-0001-9346-8291"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Sai-Weng Sin","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029369208","display_name":"Man\u2010Kay Law","orcid":"https://orcid.org/0000-0002-2799-1129"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Man-Kay Law","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026435756","display_name":"Franco Maloberti","orcid":"https://orcid.org/0000-0001-8596-7824"},"institutions":[{"id":"https://openalex.org/I25217355","display_name":"University of Pavia","ror":"https://ror.org/00s6t1f81","country_code":"IT","type":"education","lineage":["https://openalex.org/I25217355"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Franco Maloberti","raw_affiliation_strings":["Department of Electrical Computer and Biomedical Engineering, University of Pavia, Pavia, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Computer and Biomedical Engineering, University of Pavia, Pavia, Italy","institution_ids":["https://openalex.org/I25217355"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025624802","display_name":"Man\u2010Chung Wong","orcid":"https://orcid.org/0000-0001-5453-8576"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Man-Chung Wong","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061042931","display_name":"U Seng\u2010Pan","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]},{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["CH","MO"],"is_corresponding":false,"raw_author_name":"U Seng-Pan","raw_affiliation_strings":["State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","Synopsys Macau Ltd"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"Synopsys Macau Ltd","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5106943352","display_name":"Rui P. Martins","orcid":"https://orcid.org/0000-0003-2821-648X"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I203847022","display_name":"Instituto Polit\u00e9cnico de Lisboa","ror":"https://ror.org/04ea70f07","country_code":"PT","type":"education","lineage":["https://openalex.org/I203847022"]},{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO","PT"],"is_corresponding":false,"raw_author_name":"Rui Paulo Martins","raw_affiliation_strings":["On leave from Instituto Superior T\u00e9cnico/Universidade de Lisboa, Portugal","State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China"],"affiliations":[{"raw_affiliation_string":"On leave from Instituto Superior T\u00e9cnico/Universidade de Lisboa, Portugal","institution_ids":["https://openalex.org/I203847022","https://openalex.org/I141596103"]},{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China","institution_ids":["https://openalex.org/I204512498"]}]}],"institutions":[],"countries_distinct_count":4,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5022975807"],"corresponding_institution_ids":["https://openalex.org/I204512498"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.09757015,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"561","last_page":"564"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10175","display_name":"Advanced DC-DC Converters","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.7049179077148438},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.5438334345817566},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.5424299240112305},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.5405937433242798},{"id":"https://openalex.org/keywords/pulse-width-modulation","display_name":"Pulse-width modulation","score":0.5372327566146851},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5245716571807861},{"id":"https://openalex.org/keywords/pid-controller","display_name":"PID controller","score":0.5161932110786438},{"id":"https://openalex.org/keywords/ripple","display_name":"Ripple","score":0.49445462226867676},{"id":"https://openalex.org/keywords/digital-control","display_name":"Digital control","score":0.4813474118709564},{"id":"https://openalex.org/keywords/matlab","display_name":"MATLAB","score":0.45532727241516113},{"id":"https://openalex.org/keywords/analog-to-digital-converter","display_name":"Analog-to-digital converter","score":0.4352192282676697},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.4308279752731323},{"id":"https://openalex.org/keywords/digital-to-analog-converter","display_name":"Digital-to-analog converter","score":0.4292127788066864},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4257080554962158},{"id":"https://openalex.org/keywords/frequency-domain","display_name":"Frequency domain","score":0.4115551710128784},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3720608353614807},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3142281174659729},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.20895075798034668},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.18424662947654724},{"id":"https://openalex.org/keywords/control-engineering","display_name":"Control engineering","score":0.07760125398635864}],"concepts":[{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.7049179077148438},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.5438334345817566},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.5424299240112305},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.5405937433242798},{"id":"https://openalex.org/C92746544","wikidata":"https://www.wikidata.org/wiki/Q585184","display_name":"Pulse-width modulation","level":3,"score":0.5372327566146851},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5245716571807861},{"id":"https://openalex.org/C47116090","wikidata":"https://www.wikidata.org/wiki/Q716829","display_name":"PID controller","level":3,"score":0.5161932110786438},{"id":"https://openalex.org/C2779599953","wikidata":"https://www.wikidata.org/wiki/Q1776117","display_name":"Ripple","level":3,"score":0.49445462226867676},{"id":"https://openalex.org/C158411068","wikidata":"https://www.wikidata.org/wiki/Q2720568","display_name":"Digital control","level":2,"score":0.4813474118709564},{"id":"https://openalex.org/C2780365114","wikidata":"https://www.wikidata.org/wiki/Q169478","display_name":"MATLAB","level":2,"score":0.45532727241516113},{"id":"https://openalex.org/C2777271169","wikidata":"https://www.wikidata.org/wiki/Q190169","display_name":"Analog-to-digital converter","level":3,"score":0.4352192282676697},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.4308279752731323},{"id":"https://openalex.org/C2779879419","wikidata":"https://www.wikidata.org/wiki/Q210863","display_name":"Digital-to-analog converter","level":3,"score":0.4292127788066864},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4257080554962158},{"id":"https://openalex.org/C19118579","wikidata":"https://www.wikidata.org/wiki/Q786423","display_name":"Frequency domain","level":2,"score":0.4115551710128784},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3720608353614807},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3142281174659729},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.20895075798034668},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.18424662947654724},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.07760125398635864},{"id":"https://openalex.org/C536315585","wikidata":"https://www.wikidata.org/wiki/Q7698332","display_name":"Temperature control","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isie.2017.8001307","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isie.2017.8001307","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 26th International Symposium on Industrial Electronics (ISIE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Reduced inequalities","score":0.6600000262260437,"id":"https://metadata.un.org/sdg/10"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2033467529","https://openalex.org/W2105216023","https://openalex.org/W2109256542","https://openalex.org/W2110245858","https://openalex.org/W2119199553","https://openalex.org/W2135600394","https://openalex.org/W2144077467","https://openalex.org/W2160435950","https://openalex.org/W2245474869"],"related_works":["https://openalex.org/W2375446025","https://openalex.org/W2316679782","https://openalex.org/W2072062814","https://openalex.org/W2538644838","https://openalex.org/W3145876177","https://openalex.org/W249384923","https://openalex.org/W3097708393","https://openalex.org/W2398420255","https://openalex.org/W2765701569","https://openalex.org/W582916503"],"abstract_inverted_index":{"This":[0,84],"paper":[1],"introduces":[2],"a":[3,93],"digital":[4,49,69,96],"PWM":[5],"control":[6,50,57],"of":[7,28,51,92],"the":[8,25,29,34,40,48,52,90],"KY":[9,30,53,98],"step-up":[10,31,99],"converter":[11,19,32,54,100],"based":[12,38],"on":[13,39],"frequency":[14,44],"domain":[15],"sigma-delta":[16,43],"(\u03a3\u0394)":[17],"analog-to-digital":[18],"(ADC),":[20],"in":[21,79,89],"which":[22],"we":[23],"deduce":[24],"mathematical":[26],"modeling":[27,85],"and":[33,68,106],"frequency-domain":[35],"digitization":[36],"technique":[37],"first-order":[41],"non-feedback":[42],"discriminators":[45],"(NF-SDFD).":[46],"Then,":[47],"with":[55,101],"voltage":[56,104],"oscillator":[58],"(VCO),":[59],"NF-SDFD,":[60],"cascaded":[61],"integrator":[62],"comb":[63],"(CIC)":[64],"decimator,":[65],"PID":[66],"compensator":[67],"pulse":[70],"width":[71],"modulation":[72],"(DPWM)":[73],"generator":[74],"has":[75],"been":[76],"successfully":[77],"built":[78],"MATLAB":[80],"Simulink":[81],"for":[82],"verification.":[83],"work":[86],"is":[87],"useful":[88],"design":[91],"low":[94,102],"power":[95],"controlled":[97],"output":[103],"ripple":[105],"fast":[107],"transient":[108],"response.":[109]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
