{"id":"https://openalex.org/W1978936278","doi":"https://doi.org/10.1109/isicir.2014.7029558","title":"A new memoryless and low-latency FFT rotator architecture","display_name":"A new memoryless and low-latency FFT rotator architecture","publication_year":2014,"publication_date":"2014-12-01","ids":{"openalex":"https://openalex.org/W1978936278","doi":"https://doi.org/10.1109/isicir.2014.7029558","mag":"1978936278"},"language":"en","primary_location":{"id":"doi:10.1109/isicir.2014.7029558","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isicir.2014.7029558","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Symposium on Integrated Circuits (ISIC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049455630","display_name":"Shen-Jui Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I4210111328","display_name":"Novatek Microelectronics (Taiwan)","ror":"https://ror.org/02s6rdg38","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210111328"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Shen-Jui Huang","raw_affiliation_strings":["Novatek Microelectronics Corp. Hsin-chu, Taiwan, ROC"],"affiliations":[{"raw_affiliation_string":"Novatek Microelectronics Corp. Hsin-chu, Taiwan, ROC","institution_ids":["https://openalex.org/I4210111328"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053493406","display_name":"Sau-Gee Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Sau-Gee Chen","raw_affiliation_strings":["Department of Electronics Engineering and Institute of Electronics National Chiao Tung University Hsin-chu, Taiwan, ROC","Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsin Chu, Taiwan, ROC"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering and Institute of Electronics National Chiao Tung University Hsin-chu, Taiwan, ROC","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsin Chu, Taiwan, ROC","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5049455630"],"corresponding_institution_ids":["https://openalex.org/I4210111328"],"apc_list":null,"apc_paid":null,"fwci":0.2911,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.52540509,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"1","issue":null,"first_page":"180","last_page":"183"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9851999878883362,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/twiddle-factor","display_name":"Twiddle factor","score":0.8251962661743164},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.8000312447547913},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6918694972991943},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6639922261238098},{"id":"https://openalex.org/keywords/cordic","display_name":"CORDIC","score":0.5690537095069885},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.5148810148239136},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4887787997722626},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.48260772228240967},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4770190715789795},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.44942283630371094},{"id":"https://openalex.org/keywords/split-radix-fft-algorithm","display_name":"Split-radix FFT algorithm","score":0.42876753211021423},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.42448049783706665},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3496081829071045},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3351767957210541},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.3225287199020386},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.3201517164707184},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2832670509815216},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.20942702889442444}],"concepts":[{"id":"https://openalex.org/C4697666","wikidata":"https://www.wikidata.org/wiki/Q7857913","display_name":"Twiddle factor","level":5,"score":0.8251962661743164},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.8000312447547913},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6918694972991943},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6639922261238098},{"id":"https://openalex.org/C58870171","wikidata":"https://www.wikidata.org/wiki/Q116076","display_name":"CORDIC","level":3,"score":0.5690537095069885},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.5148810148239136},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4887787997722626},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.48260772228240967},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4770190715789795},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.44942283630371094},{"id":"https://openalex.org/C103755468","wikidata":"https://www.wikidata.org/wiki/Q17103599","display_name":"Split-radix FFT algorithm","level":5,"score":0.42876753211021423},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.42448049783706665},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3496081829071045},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3351767957210541},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.3225287199020386},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.3201517164707184},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2832670509815216},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.20942702889442444},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C166386157","wikidata":"https://www.wikidata.org/wiki/Q1477735","display_name":"Short-time Fourier transform","level":4,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isicir.2014.7029558","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isicir.2014.7029558","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Symposium on Integrated Circuits (ISIC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1509351983","https://openalex.org/W2025849754","https://openalex.org/W2063879057","https://openalex.org/W2065490696","https://openalex.org/W2096420311","https://openalex.org/W2111161323","https://openalex.org/W2143760361","https://openalex.org/W2153069353","https://openalex.org/W6630142673","https://openalex.org/W6674676489","https://openalex.org/W6676336353"],"related_works":["https://openalex.org/W2004227548","https://openalex.org/W1555715953","https://openalex.org/W2946994569","https://openalex.org/W2053005077","https://openalex.org/W3164064657","https://openalex.org/W3189510409","https://openalex.org/W2283741562","https://openalex.org/W284127502","https://openalex.org/W1978936278","https://openalex.org/W4293868931"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"new":[3],"rotator":[4],"architecture":[5,11,68,108,119],"for":[6,32,125],"FFT":[7,79,100,131],"computation.":[8],"The":[9,112],"proposed":[10,67,107,118],"consists":[12],"of":[13,43,63],"cascaded":[14],"multiplier-less":[15],"cells,":[16],"and":[17,29,122],"each":[18,36],"cell":[19,37,96],"stage":[20],"performs":[21],"partial":[22],"twiddle":[23,49,76],"factor":[24],"multiplications":[25],"with":[26,40,56],"low-complexity":[27],"adders":[28],"multiplexers.":[30],"Besides,":[31],"further":[33],"area":[34],"reduction,":[35],"is":[38,120,123],"optimized":[39],"the":[41,66,106,117],"technique":[42],"common":[44],"subexpression":[45],"sharing.":[46],"Since":[47],"those":[48],"factors":[50],"involved":[51],"in":[52],"computation":[53],"are":[54],"realized":[55],"multipliers":[57],"generated":[58],"on-the-fly":[59],"by":[60,90],"a":[61],"scheme":[62],"coefficient":[64],"selection,":[65],"doesn't":[69],"require":[70],"memory":[71,129],"space":[72],"to":[73,103],"store":[74],"any":[75],"factors.":[77],"Variable":[78],"lengths":[80],"ranging":[81],"from":[82],"64":[83],"~":[84],"32768":[85],"points":[86],"can":[87],"be":[88],"supported":[89],"flexibly":[91],"adding":[92],"or":[93,128],"removing":[94],"some":[95],"stages,":[97],"depends":[98],"on":[99],"length.":[101],"Compared":[102],"CORDIC-based":[104],"architectures,":[105],"has":[109],"lower":[110],"latency.":[111],"implementation":[113],"results":[114],"show":[115],"that":[116],"area-efficient":[121],"suitable":[124],"either":[126],"pipelined":[127],"based":[130],"architectures.":[132]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
