{"id":"https://openalex.org/W2052416515","doi":"https://doi.org/10.1109/isicir.2014.7029453","title":"A more accurate circuit model for CMOS Hall cross with non-linear resistors and JFETs","display_name":"A more accurate circuit model for CMOS Hall cross with non-linear resistors and JFETs","publication_year":2014,"publication_date":"2014-12-01","ids":{"openalex":"https://openalex.org/W2052416515","doi":"https://doi.org/10.1109/isicir.2014.7029453","mag":"2052416515"},"language":"en","primary_location":{"id":"doi:10.1109/isicir.2014.7029453","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isicir.2014.7029453","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Symposium on Integrated Circuits (ISIC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020860781","display_name":"Fei Lyu","orcid":"https://orcid.org/0000-0003-2282-1574"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Fei Lyu","raw_affiliation_strings":["School of Electronic Science & Engineering, Nanjing University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"School of Electronic Science & Engineering, Nanjing University, Nanjing, China","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031416500","display_name":"Zhenduo Zhu","orcid":"https://orcid.org/0000-0002-7711-7632"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhenduo Zhu","raw_affiliation_strings":["School of Electronic Science & Engineering, Nanjing University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"School of Electronic Science & Engineering, Nanjing University, Nanjing, China","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054369251","display_name":"Zhenfei Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhenfei Lu","raw_affiliation_strings":["School of Electronic Science & Engineering, Nanjing University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"School of Electronic Science & Engineering, Nanjing University, Nanjing, China","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100361096","display_name":"Li Li","orcid":"https://orcid.org/0000-0002-1047-6067"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li Li","raw_affiliation_strings":["Nanjing University, Nanjing, Jiangsu, CN"],"affiliations":[{"raw_affiliation_string":"Nanjing University, Nanjing, Jiangsu, CN","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040321689","display_name":"Jin Sha","orcid":"https://orcid.org/0000-0002-0266-3583"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jin Sha","raw_affiliation_strings":["School of Electronic Science & Engineering, Nanjing University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"School of Electronic Science & Engineering, Nanjing University, Nanjing, China","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027952470","display_name":"Hongbing Pan","orcid":"https://orcid.org/0000-0002-7181-8278"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hongbing Pan","raw_affiliation_strings":["School of Electronic Science & Engineering, Nanjing University, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"School of Electronic Science & Engineering, Nanjing University, Nanjing, China","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034667688","display_name":"Yutong Bi","orcid":"https://orcid.org/0000-0003-3739-3277"},"institutions":[{"id":"https://openalex.org/I3132008252","display_name":"Nanjing Foreign Language School","ror":"https://ror.org/03wvwbe92","country_code":"CN","type":"education","lineage":["https://openalex.org/I3132008252"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yutong Bi","raw_affiliation_strings":["Nanjing Foreign Language School, Nanjing, Chinan"],"affiliations":[{"raw_affiliation_string":"Nanjing Foreign Language School, Nanjing, Chinan","institution_ids":["https://openalex.org/I3132008252"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5020860781"],"corresponding_institution_ids":["https://openalex.org/I881766915"],"apc_list":null,"apc_paid":null,"fwci":0.2093,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.59385409,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"106","issue":null,"first_page":"524","last_page":"527"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12692","display_name":"Magnetic Field Sensors Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12692","display_name":"Magnetic Field Sensors Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10382","display_name":"Quantum and electron transport phenomena","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistor","display_name":"Resistor","score":0.8961814641952515},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6667718887329102},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6407405734062195},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5553398728370667},{"id":"https://openalex.org/keywords/semiconductor-device-modeling","display_name":"Semiconductor device modeling","score":0.5155308246612549},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.512589156627655},{"id":"https://openalex.org/keywords/diode","display_name":"Diode","score":0.455933541059494},{"id":"https://openalex.org/keywords/pull-up-resistor","display_name":"Pull-up resistor","score":0.44555050134658813},{"id":"https://openalex.org/keywords/cadence","display_name":"Cadence","score":0.4382554590702057},{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.4349733591079712},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4293457269668579},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3973899483680725},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.37872812151908875},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2872120440006256},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.11389759182929993},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.08304637670516968}],"concepts":[{"id":"https://openalex.org/C137488568","wikidata":"https://www.wikidata.org/wiki/Q5321","display_name":"Resistor","level":3,"score":0.8961814641952515},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6667718887329102},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6407405734062195},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5553398728370667},{"id":"https://openalex.org/C4775677","wikidata":"https://www.wikidata.org/wiki/Q7449393","display_name":"Semiconductor device modeling","level":3,"score":0.5155308246612549},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.512589156627655},{"id":"https://openalex.org/C78434282","wikidata":"https://www.wikidata.org/wiki/Q11656","display_name":"Diode","level":2,"score":0.455933541059494},{"id":"https://openalex.org/C61818909","wikidata":"https://www.wikidata.org/wiki/Q1987617","display_name":"Pull-up resistor","level":5,"score":0.44555050134658813},{"id":"https://openalex.org/C2777125575","wikidata":"https://www.wikidata.org/wiki/Q14088448","display_name":"Cadence","level":2,"score":0.4382554590702057},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.4349733591079712},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4293457269668579},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3973899483680725},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.37872812151908875},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2872120440006256},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.11389759182929993},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.08304637670516968},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isicir.2014.7029453","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isicir.2014.7029453","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Symposium on Integrated Circuits (ISIC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8299999833106995}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1980959647","https://openalex.org/W1998432998","https://openalex.org/W2014034928","https://openalex.org/W2049583890","https://openalex.org/W2058023304","https://openalex.org/W2099267231","https://openalex.org/W2135591779","https://openalex.org/W2156428358","https://openalex.org/W2167242465","https://openalex.org/W3013218635","https://openalex.org/W4243374555","https://openalex.org/W6674761210"],"related_works":["https://openalex.org/W74846200","https://openalex.org/W2425729383","https://openalex.org/W2141568571","https://openalex.org/W2065137157","https://openalex.org/W2193954460","https://openalex.org/W2575093156","https://openalex.org/W2158010495","https://openalex.org/W2154577534","https://openalex.org/W2352103776","https://openalex.org/W1523927632"],"abstract_inverted_index":{"We":[0],"propose":[1],"a":[2],"more":[3],"accurate":[4],"model":[5,15,68,89],"for":[6],"CMOS":[7],"Hall":[8],"cross":[9],"with":[10,94],"resistors":[11],"and":[12,33,57,64,77],"JFETs.":[13],"This":[14],"not":[16],"only":[17],"completely":[18],"takes":[19],"into":[20],"account":[21],"the":[22,39,42,88,95],"physical":[23],"effects,":[24,28,30,32],"such":[25],"as":[26],"geometrical":[27],"temperature":[29],"parasitical":[31],"so":[34],"on,":[35],"but":[36],"also":[37],"assures":[38],"symmetry":[40],"of":[41,47,87],"model.":[43],"And":[44],"it":[45],"consists":[46],"eight":[48],"nonlinear":[49],"resistors,":[50],"four":[51,53,58],"JFETs,":[52],"current-controlled":[54],"voltage":[55],"sources,":[56],"reversed-biased":[59],"diodes":[60],"modeled":[61],"by":[62],"capacitors":[63],"constant-current":[65],"sources.":[66],"The":[67,84],"has":[69],"been":[70],"written":[71],"in":[72,79,91],"Verilog-A":[73],"hardware":[74],"description":[75],"language":[76],"applied":[78],"Cadence":[80],"Spectre":[81],"simulator":[82],"successfully.":[83],"simulation":[85],"results":[86],"are":[90],"good":[92],"agreement":[93],"experimental":[96],"results.":[97]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}