{"id":"https://openalex.org/W2036372420","doi":"https://doi.org/10.1109/isicir.2014.7029442","title":"MTCMOS low-power design technique (LPDT) for low-voltage pipelined microprocessor circuits","display_name":"MTCMOS low-power design technique (LPDT) for low-voltage pipelined microprocessor circuits","publication_year":2014,"publication_date":"2014-12-01","ids":{"openalex":"https://openalex.org/W2036372420","doi":"https://doi.org/10.1109/isicir.2014.7029442","mag":"2036372420"},"language":"en","primary_location":{"id":"doi:10.1109/isicir.2014.7029442","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isicir.2014.7029442","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Symposium on Integrated Circuits (ISIC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110742483","display_name":"Ching-Min Hsu","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"C. B. Hsu","raw_affiliation_strings":["Dept. of Electrical Engineering, National Taiwan University, Taipei, Taiwan","Department of Electrical Engineering National Taiwan University Taipei, Taiwan 106"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Department of Electrical Engineering National Taiwan University Taipei, Taiwan 106","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111506668","display_name":"J.B. Kuo","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"J. B. Kuo","raw_affiliation_strings":["Dept. of Electrical Engineering, National Taiwan University, Taipei, Taiwan","Department of Electrical Engineering National Taiwan University Taipei, Taiwan 106"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Department of Electrical Engineering National Taiwan University Taipei, Taiwan 106","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5110742483"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.2129,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.58829875,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"328","last_page":"331"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.8357541561126709},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.721011757850647},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6823191046714783},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.6698915958404541},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5800024271011353},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.5352827310562134},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5117902159690857},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.48318591713905334},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.46956944465637207},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.44882258772850037},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.44849610328674316},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.44234007596969604},{"id":"https://openalex.org/keywords/power-optimization","display_name":"Power optimization","score":0.42981475591659546},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4121590256690979},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.37637442350387573},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.33934104442596436},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32274651527404785},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20891496539115906}],"concepts":[{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.8357541561126709},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.721011757850647},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6823191046714783},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.6698915958404541},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5800024271011353},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.5352827310562134},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5117902159690857},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.48318591713905334},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.46956944465637207},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.44882258772850037},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.44849610328674316},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.44234007596969604},{"id":"https://openalex.org/C168292644","wikidata":"https://www.wikidata.org/wiki/Q10860336","display_name":"Power optimization","level":4,"score":0.42981475591659546},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4121590256690979},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.37637442350387573},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.33934104442596436},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32274651527404785},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20891496539115906},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/isicir.2014.7029442","is_oa":false,"landing_page_url":"https://doi.org/10.1109/isicir.2014.7029442","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Symposium on Integrated Circuits (ISIC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W398027425","https://openalex.org/W1567646530","https://openalex.org/W2004934210","https://openalex.org/W2077587664","https://openalex.org/W2112045932","https://openalex.org/W2130968703","https://openalex.org/W4251099801","https://openalex.org/W6634196629"],"related_works":["https://openalex.org/W2130127169","https://openalex.org/W1999476393","https://openalex.org/W2551878898","https://openalex.org/W2207750882","https://openalex.org/W1921751656","https://openalex.org/W2018577544","https://openalex.org/W2121772322","https://openalex.org/W2172221758","https://openalex.org/W2084292592","https://openalex.org/W2131279316"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,9,23,72,81],"low-power":[4],"design":[5],"technique":[6],"(LPDT)":[7],"for":[8,123,134],"low-voltage":[10],"pipelined":[11,24,63,125],"microprocessor":[12,26],"circuit":[13,27],"via":[14],"multi-threshold":[15],"CMOS":[16,74],"(MTCMOS)":[17],"techniques.":[18],"Using":[19],"the":[20,58,66,91,96,103,109,112,124,128,143],"MTCMOS":[21,67,129],"LPDT,":[22],"MIPS":[25],"having":[28],"220,000":[29],"transistors":[30],"with":[31,65,127],"5":[32],"stages":[33],"per":[34],"instruction":[35],"has":[36,85],"been":[37,86],"optimized":[38],"in":[39,119],"terms":[40],"of":[41],"power":[42,99,121,140],"consumption":[43,122,141],"using":[44,71,111],"standard":[45],"threshold-SVT":[46],"and":[47,79,100],"high":[48],"threshold-HVT":[49],"logic":[50],"cells.":[51],"According":[52],"to":[53,108,145],"SPICE":[54],"simulation":[55],"results,":[56],"during":[57],"4-instruction":[59],"compare":[60],"operation,":[61],"this":[62],"CPU":[64,126],"LPDT":[68,130],"optimization,":[69],"designed":[70],"90nm":[73],"technology,":[75],"operating":[76],"at":[77,80],"1V":[78],"1.3-ns":[82],"clock":[83],"period,":[84],"reduced":[87],"by":[88],"40.1%":[89],"on":[90,95,102],"leakage":[92,120,139],"power,":[93,105],"17.8%":[94],"average":[97],"total":[98],"13.3%":[101],"peak":[104],"as":[106],"compared":[107],"one":[110],"conventional":[113],"SVT":[114],"one.":[115],"The":[116],"substantial":[117],"saving":[118],"optimization":[131],"could":[132],"benefit":[133],"hand-held":[135],"IT":[136],"applications,":[137],"where":[138],"is":[142],"key":[144],"battery":[146],"life.":[147]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
