{"id":"https://openalex.org/W2791413751","doi":"https://doi.org/10.1109/ised.2017.8303942","title":"Voltage mode universal filter design using CCDDCCTA","display_name":"Voltage mode universal filter design using CCDDCCTA","publication_year":2017,"publication_date":"2017-12-01","ids":{"openalex":"https://openalex.org/W2791413751","doi":"https://doi.org/10.1109/ised.2017.8303942","mag":"2791413751"},"language":"en","primary_location":{"id":"doi:10.1109/ised.2017.8303942","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ised.2017.8303942","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 7th International Symposium on Embedded Computing and System Design (ISED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003517573","display_name":"Rupam Das","orcid":"https://orcid.org/0000-0002-2296-1553"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Rupam Das","raw_affiliation_strings":["Electronics & Communication Engineering, AsansolEngineering College, Asansol, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics & Communication Engineering, AsansolEngineering College, Asansol, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032365641","display_name":"Kaustav Mallick","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kaustav Mallick","raw_affiliation_strings":["Electronics & Communication Engineering, AsansolEngineering College, Asansol, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics & Communication Engineering, AsansolEngineering College, Asansol, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067195050","display_name":"Tunisha Tanvi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tunisha Tanvi","raw_affiliation_strings":["Electronics & Communication Engineering, AsansolEngineering College, Asansol, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics & Communication Engineering, AsansolEngineering College, Asansol, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052208993","display_name":"Kanishka Sah","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kanishka Sah","raw_affiliation_strings":["Electronics & Communication Engineering, AsansolEngineering College, Asansol, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics & Communication Engineering, AsansolEngineering College, Asansol, India","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20556575,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"3","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.6654525995254517},{"id":"https://openalex.org/keywords/sensitivity","display_name":"Sensitivity (control systems)","score":0.6622486710548401},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5997571349143982},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5651060938835144},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.520648181438446},{"id":"https://openalex.org/keywords/band-stop-filter","display_name":"Band-stop filter","score":0.5058484077453613},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4994666576385498},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.47969958186149597},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.44852370023727417},{"id":"https://openalex.org/keywords/low-pass-filter","display_name":"Low-pass filter","score":0.37361401319503784},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2909749746322632},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.27861374616622925}],"concepts":[{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.6654525995254517},{"id":"https://openalex.org/C21200559","wikidata":"https://www.wikidata.org/wiki/Q7451068","display_name":"Sensitivity (control systems)","level":2,"score":0.6622486710548401},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5997571349143982},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5651060938835144},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.520648181438446},{"id":"https://openalex.org/C112806600","wikidata":"https://www.wikidata.org/wiki/Q386022","display_name":"Band-stop filter","level":4,"score":0.5058484077453613},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4994666576385498},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.47969958186149597},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.44852370023727417},{"id":"https://openalex.org/C44682112","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Low-pass filter","level":3,"score":0.37361401319503784},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2909749746322632},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27861374616622925},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ised.2017.8303942","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ised.2017.8303942","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 7th International Symposium on Embedded Computing and System Design (ISED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7699999809265137,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W2000928649","https://openalex.org/W2010509801","https://openalex.org/W2012734747","https://openalex.org/W2031767704","https://openalex.org/W2041583251","https://openalex.org/W2074712409","https://openalex.org/W2086814700","https://openalex.org/W2088884149","https://openalex.org/W2089028581","https://openalex.org/W2120857311","https://openalex.org/W2126757142","https://openalex.org/W2151301915","https://openalex.org/W2160494492","https://openalex.org/W2183540996","https://openalex.org/W2184498328","https://openalex.org/W2321066258","https://openalex.org/W2419893917","https://openalex.org/W4237537342","https://openalex.org/W6682377928","https://openalex.org/W6686385561","https://openalex.org/W6700681528","https://openalex.org/W6717573893"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4386230336","https://openalex.org/W4306968100","https://openalex.org/W2572629276","https://openalex.org/W2022875032","https://openalex.org/W2543701934","https://openalex.org/W4386862605","https://openalex.org/W2065462772"],"abstract_inverted_index":{"This":[0,7],"article":[1],"presents":[2],"a":[3],"voltage":[4],"mode":[5],"filter.":[6],"circuit":[8,48],"has":[9],"the":[10,33,62],"following":[11],"important":[12],"features:":[13],"It":[14],"is":[15,39,49],"designed":[16],"using":[17,51],"CCDDCCTA.":[18],"All":[19],"response":[20],"like":[21],"LP,":[22],"HP,":[23],"BP,":[24],"AP,":[25],"&":[26],"notch":[27],"are":[28],"obtained":[29],"without":[30],"alteration":[31],"of":[32,36,46],"configuration.":[34],"Response":[35],"all":[37],"filters":[38],"electronically":[40],"tunable":[41],"and":[42],"Low":[43],"sensitivity.":[44],"Operation":[45],"proposed":[47],"tested":[50],"25\u03bcm":[52],"CMOS":[53],"process":[54],"through":[55],"PSPICE":[56],"simulation.":[57],"Simulated":[58],"outputs":[59],"match":[60],"with":[61],"theoretical":[63],"results.":[64]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}