{"id":"https://openalex.org/W2735001144","doi":"https://doi.org/10.1109/ised.2016.7977058","title":"High-speed decoder design using memristor-based nano-crossbar architecture","display_name":"High-speed decoder design using memristor-based nano-crossbar architecture","publication_year":2016,"publication_date":"2016-12-01","ids":{"openalex":"https://openalex.org/W2735001144","doi":"https://doi.org/10.1109/ised.2016.7977058","mag":"2735001144"},"language":"en","primary_location":{"id":"doi:10.1109/ised.2016.7977058","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ised.2016.7977058","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 Sixth International Symposium on Embedded Computing and System Design (ISED)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012367041","display_name":"Malay Kule","orcid":"https://orcid.org/0000-0002-0180-7610"},"institutions":[{"id":"https://openalex.org/I98365261","display_name":"Indian Institute of Engineering Science and Technology, Shibpur","ror":"https://ror.org/02ytfzr55","country_code":"IN","type":"education","lineage":["https://openalex.org/I98365261"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Malay Kule","raw_affiliation_strings":["Indian Institute of Engineering Science and Technology, Howrah, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Engineering Science and Technology, Howrah, India","institution_ids":["https://openalex.org/I98365261"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043681735","display_name":"Avik Dutta","orcid":null},"institutions":[{"id":"https://openalex.org/I98365261","display_name":"Indian Institute of Engineering Science and Technology, Shibpur","ror":"https://ror.org/02ytfzr55","country_code":"IN","type":"education","lineage":["https://openalex.org/I98365261"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Avik Dutta","raw_affiliation_strings":["Indian Institute of Engineering Science and Technology, Howrah, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Engineering Science and Technology, Howrah, India","institution_ids":["https://openalex.org/I98365261"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082934529","display_name":"Hafizur Rahaman","orcid":"https://orcid.org/0000-0001-9012-5437"},"institutions":[{"id":"https://openalex.org/I98365261","display_name":"Indian Institute of Engineering Science and Technology, Shibpur","ror":"https://ror.org/02ytfzr55","country_code":"IN","type":"education","lineage":["https://openalex.org/I98365261"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Hafizur Rahaman","raw_affiliation_strings":["Indian Institute of Engineering Science and Technology, Howrah, India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Engineering Science and Technology, Howrah, India","institution_ids":["https://openalex.org/I98365261"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067730042","display_name":"Bhargab B. Bhattacharya","orcid":"https://orcid.org/0000-0002-5890-2483"},"institutions":[{"id":"https://openalex.org/I6498739","display_name":"Indian Statistical Institute","ror":"https://ror.org/00q2w1j53","country_code":"IN","type":"education","lineage":["https://openalex.org/I6498739"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Bhargab B. Bhattacharya","raw_affiliation_strings":["Nanotechnology Research Triangle, Indian Statistical Institute, Kolkata, India"],"affiliations":[{"raw_affiliation_string":"Nanotechnology Research Triangle, Indian Statistical Institute, Kolkata, India","institution_ids":["https://openalex.org/I6498739"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5012367041"],"corresponding_institution_ids":["https://openalex.org/I98365261"],"apc_list":null,"apc_paid":null,"fwci":0.5513,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.73139183,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"22","issue":null,"first_page":"77","last_page":"81"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.919669508934021},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.8685461282730103},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6857470273971558},{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.584305465221405},{"id":"https://openalex.org/keywords/memistor","display_name":"Memistor","score":0.5509968996047974},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5014917850494385},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.49607715010643005},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4798687994480133},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.45970022678375244},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.44079598784446716},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.43330058455467224},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3664400577545166},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.3455973267555237},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2285226583480835},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2254064679145813},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17078882455825806},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.15823671221733093},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14743801951408386},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09353375434875488},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08494383096694946}],"concepts":[{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.919669508934021},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.8685461282730103},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6857470273971558},{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.584305465221405},{"id":"https://openalex.org/C1895703","wikidata":"https://www.wikidata.org/wiki/Q6034938","display_name":"Memistor","level":4,"score":0.5509968996047974},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5014917850494385},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.49607715010643005},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4798687994480133},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.45970022678375244},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.44079598784446716},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43330058455467224},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3664400577545166},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.3455973267555237},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2285226583480835},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2254064679145813},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17078882455825806},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.15823671221733093},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14743801951408386},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09353375434875488},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08494383096694946}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ised.2016.7977058","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ised.2016.7977058","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 Sixth International Symposium on Embedded Computing and System Design (ISED)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1970645895","https://openalex.org/W1986623396","https://openalex.org/W2003633368","https://openalex.org/W2066280488","https://openalex.org/W2079756960","https://openalex.org/W2086867508","https://openalex.org/W2112181056","https://openalex.org/W2119247813","https://openalex.org/W2140650910","https://openalex.org/W2145861266","https://openalex.org/W2162651880","https://openalex.org/W2199676716","https://openalex.org/W6677741674"],"related_works":["https://openalex.org/W2171130799","https://openalex.org/W3173413269","https://openalex.org/W2015477599","https://openalex.org/W3164474614","https://openalex.org/W4253441086","https://openalex.org/W2548135880","https://openalex.org/W2516929886","https://openalex.org/W3177379469","https://openalex.org/W2005875039","https://openalex.org/W2942778963"],"abstract_inverted_index":{"Recent":[0],"advances":[1],"in":[2,20,93],"physical":[3],"implementation":[4],"of":[5,17,43,73,85],"the":[6,51,58,74,83,89],"fourth":[7],"circuit":[8,63,76],"element,":[9],"memristor,":[10],"have":[11],"opened":[12],"up":[13],"many":[14],"promising":[15],"applications":[16],"this":[18,56],"device":[19],"versatile":[21],"areas":[22],"such":[23],"as":[24],"neuromorphic":[25],"systems,":[26],"memory,":[27],"and":[28],"logic":[29,35],"design.":[30],"One":[31],"way":[32],"to":[33,38,49,79,88],"build":[34],"circuits":[36],"is":[37,64,77,99],"use":[39],"a":[40,61],"regular":[41],"array":[42],"memristor-crossbar":[44],"that":[45],"can":[46],"be":[47],"configured":[48],"implement":[50],"required":[52],"Boolean":[53],"functions.":[54],"In":[55],"work,":[57],"design":[59,98],"for":[60],"decoder":[62],"described":[65],"using":[66,101],"memristor-based":[67],"nanoscale":[68],"crossbar":[69],"architecture.":[70],"The":[71,96],"delay":[72,91],"proposed":[75,97],"observed":[78],"grow":[80],"linearly":[81],"with":[82],"number":[84],"inputs":[86],"compared":[87],"exponential":[90],"experienced":[92],"earlier":[94],"designs.":[95],"validated":[100],"NgSpice":[102],"simulation.":[103]},"counts_by_year":[{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}