{"id":"https://openalex.org/W2784070562","doi":"https://doi.org/10.1109/iscit.2017.8261201","title":"Design of fifth-order LF 0.05\u00b0 equiripple linear phase lowpass filter with gain boost using nauta transcondutor","display_name":"Design of fifth-order LF 0.05\u00b0 equiripple linear phase lowpass filter with gain boost using nauta transcondutor","publication_year":2017,"publication_date":"2017-09-01","ids":{"openalex":"https://openalex.org/W2784070562","doi":"https://doi.org/10.1109/iscit.2017.8261201","mag":"2784070562"},"language":"en","primary_location":{"id":"doi:10.1109/iscit.2017.8261201","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscit.2017.8261201","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 17th International Symposium on Communications and Information Technologies (ISCIT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020364531","display_name":"Yichuang Sun","orcid":"https://orcid.org/0000-0001-8352-2119"},"institutions":[{"id":"https://openalex.org/I141584323","display_name":"University of Hertfordshire","ror":"https://ror.org/0267vjk41","country_code":"GB","type":"education","lineage":["https://openalex.org/I141584323"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Yichuang Sun","raw_affiliation_strings":["School of Engineering and Technology, University of Hertfordshire, Hatfield, Hertfordshire, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Engineering and Technology, University of Hertfordshire, Hatfield, Hertfordshire, UK","institution_ids":["https://openalex.org/I141584323"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088963956","display_name":"Xi Zhu","orcid":"https://orcid.org/0000-0002-5814-394X"},"institutions":[{"id":"https://openalex.org/I114017466","display_name":"University of Technology Sydney","ror":"https://ror.org/03f0f6041","country_code":"AU","type":"education","lineage":["https://openalex.org/I114017466"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Xi Zhu","raw_affiliation_strings":["Global Big Data Technology Centre, University of Technology Sydney, Ultimo, NSW, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Global Big Data Technology Centre, University of Technology Sydney, Ultimo, NSW, Australia","institution_ids":["https://openalex.org/I114017466"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060182371","display_name":"Meriam Gay Bautista","orcid":"https://orcid.org/0000-0002-2500-3131"},"institutions":[{"id":"https://openalex.org/I114017466","display_name":"University of Technology Sydney","ror":"https://ror.org/03f0f6041","country_code":"AU","type":"education","lineage":["https://openalex.org/I114017466"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Meriam G. Bautista","raw_affiliation_strings":["Global Big Data Technology Centre, University of Technology Sydney, Ultimo, NSW, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Global Big Data Technology Centre, University of Technology Sydney, Ultimo, NSW, Australia","institution_ids":["https://openalex.org/I114017466"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.19552,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.6278667449951172},{"id":"https://openalex.org/keywords/low-pass-filter","display_name":"Low-pass filter","score":0.6057999730110168},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.5976026058197021},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5697895288467407},{"id":"https://openalex.org/keywords/linear-phase","display_name":"Linear phase","score":0.4880169928073883},{"id":"https://openalex.org/keywords/all-pass-filter","display_name":"All-pass filter","score":0.47311803698539734},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3973456621170044},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.392947256565094},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3845771551132202},{"id":"https://openalex.org/keywords/band-stop-filter","display_name":"Band-stop filter","score":0.360222190618515},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3479764461517334},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.332773357629776},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.19134774804115295},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.09106144309043884}],"concepts":[{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.6278667449951172},{"id":"https://openalex.org/C44682112","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Low-pass filter","level":3,"score":0.6057999730110168},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.5976026058197021},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5697895288467407},{"id":"https://openalex.org/C20610874","wikidata":"https://www.wikidata.org/wiki/Q512136","display_name":"Linear phase","level":3,"score":0.4880169928073883},{"id":"https://openalex.org/C47427576","wikidata":"https://www.wikidata.org/wiki/Q1431902","display_name":"All-pass filter","level":5,"score":0.47311803698539734},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3973456621170044},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.392947256565094},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3845771551132202},{"id":"https://openalex.org/C112806600","wikidata":"https://www.wikidata.org/wiki/Q386022","display_name":"Band-stop filter","level":4,"score":0.360222190618515},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3479764461517334},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.332773357629776},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.19134774804115295},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.09106144309043884},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iscit.2017.8261201","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscit.2017.8261201","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 17th International Symposium on Communications and Information Technologies (ISCIT)","raw_type":"proceedings-article"},{"id":"pmh:oai:opus.lib.uts.edu.au:10453/127303","is_oa":false,"landing_page_url":"http://hdl.handle.net/10453/127303","pdf_url":null,"source":{"id":"https://openalex.org/S4306401357","display_name":"UTS ePRESS (University of Technology Sydney)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I114017466","host_organization_name":"University of Technology Sydney","host_organization_lineage":["https://openalex.org/I114017466"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Conference Proceeding"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7400000095367432,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2096427271","https://openalex.org/W2098746461","https://openalex.org/W2121226030","https://openalex.org/W2143107225","https://openalex.org/W2160311824","https://openalex.org/W2167435665"],"related_works":["https://openalex.org/W1990003648","https://openalex.org/W273308677","https://openalex.org/W2169415806","https://openalex.org/W2366286831","https://openalex.org/W2572629276","https://openalex.org/W2133386783","https://openalex.org/W2165622783","https://openalex.org/W2380276090","https://openalex.org/W2384426484","https://openalex.org/W2125923908"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"a":[3,31,51],"leapfrog":[4],"feedback":[5],"filter":[6,24,56],"architecture":[7],"that":[8,72],"uses":[9],"only":[10,36],"single-ended":[11,14],"input":[12],"and":[13,18,34],"output":[15],"(SISO)":[16],"transconductors":[17],"grounded":[19,32],"capacitors":[20],"is":[21],"described.":[22],"The":[23],"structure":[25],"has":[26,60],"all":[27],"circuit":[28],"nodes":[29],"containing":[30],"capacitor":[33],"requires":[35],"simple":[37],"transconductors,":[38],"thus":[39],"suitable":[40],"for":[41],"higher":[42],"frequency":[43,49],"applications.":[44],"To":[45],"show":[46],"the":[47,69],"high":[48],"capability,":[50],"fifth-order":[52],"linear":[53],"phase":[54],"UHF":[55],"with":[57],"gain":[58],"boost":[59],"been":[61],"designed":[62],"using":[63],"Nauta":[64,73],"transconductor.":[65],"This":[66],"may":[67],"be":[68],"first":[70],"time":[71],"transcodunctors":[74],"are":[75],"used":[76],"in":[77],"HDD":[78],"read":[79],"channels.":[80]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
