{"id":"https://openalex.org/W2012150093","doi":"https://doi.org/10.1109/iscit.2012.6381040","title":"CNFET based ternary magnitude comparator","display_name":"CNFET based ternary magnitude comparator","publication_year":2012,"publication_date":"2012-10-01","ids":{"openalex":"https://openalex.org/W2012150093","doi":"https://doi.org/10.1109/iscit.2012.6381040","mag":"2012150093"},"language":"en","primary_location":{"id":"doi:10.1109/iscit.2012.6381040","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscit.2012.6381040","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 International Symposium on Communications and Information Technologies (ISCIT)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014347182","display_name":"Chetan Vudadha","orcid":"https://orcid.org/0000-0002-0277-2931"},"institutions":[{"id":"https://openalex.org/I4210101034","display_name":"Birla Institute of Technology and Science - Hyderabad Campus","ror":"https://ror.org/014ctt859","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]},{"id":"https://openalex.org/I74796645","display_name":"Birla Institute of Technology and Science, Pilani","ror":"https://ror.org/001p3jz28","country_code":"IN","type":"education","lineage":["https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Chetan Vudadha","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science-Pilani Hyderabad Campus, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science-Pilani Hyderabad Campus, Hyderabad, India","institution_ids":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081207415","display_name":"P. Sai Phaneendra","orcid":null},"institutions":[{"id":"https://openalex.org/I74796645","display_name":"Birla Institute of Technology and Science, Pilani","ror":"https://ror.org/001p3jz28","country_code":"IN","type":"education","lineage":["https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Phaneendra P. Sai","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science-Pilani, Hyderabad Campus, India-50078"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science-Pilani, Hyderabad Campus, India-50078","institution_ids":["https://openalex.org/I74796645"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109637670","display_name":"V. Sreehari","orcid":null},"institutions":[{"id":"https://openalex.org/I4210101034","display_name":"Birla Institute of Technology and Science - Hyderabad Campus","ror":"https://ror.org/014ctt859","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]},{"id":"https://openalex.org/I74796645","display_name":"Birla Institute of Technology and Science, Pilani","ror":"https://ror.org/001p3jz28","country_code":"IN","type":"education","lineage":["https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"V. Sreehari","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science-Pilani Hyderabad Campus, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science-Pilani Hyderabad Campus, Hyderabad, India","institution_ids":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079825929","display_name":"M. B. Srinivas","orcid":"https://orcid.org/0000-0003-1555-3639"},"institutions":[{"id":"https://openalex.org/I4210101034","display_name":"Birla Institute of Technology and Science - Hyderabad Campus","ror":"https://ror.org/014ctt859","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]},{"id":"https://openalex.org/I74796645","display_name":"Birla Institute of Technology and Science, Pilani","ror":"https://ror.org/001p3jz28","country_code":"IN","type":"education","lineage":["https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"M.B. Srinivas","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science-Pilani Hyderabad Campus, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science-Pilani Hyderabad Campus, Hyderabad, India","institution_ids":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"25","issue":null,"first_page":"942","last_page":"946"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.9468427896499634},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6749280095100403},{"id":"https://openalex.org/keywords/ternary-operation","display_name":"Ternary operation","score":0.6407438516616821},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5652884244918823},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5592225790023804},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5198298096656799},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.49274852871894836},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4259370267391205},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.23087862133979797},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2220933437347412},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.21711811423301697},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.159681499004364},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.0883546769618988}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.9468427896499634},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6749280095100403},{"id":"https://openalex.org/C64452783","wikidata":"https://www.wikidata.org/wiki/Q1524945","display_name":"Ternary operation","level":2,"score":0.6407438516616821},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5652884244918823},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5592225790023804},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5198298096656799},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.49274852871894836},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4259370267391205},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.23087862133979797},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2220933437347412},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.21711811423301697},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.159681499004364},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0883546769618988},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscit.2012.6381040","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscit.2012.6381040","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 International Symposium on Communications and Information Technologies (ISCIT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1972913619","https://openalex.org/W1988953463","https://openalex.org/W1992764350","https://openalex.org/W2005010600","https://openalex.org/W2016710629","https://openalex.org/W2018735115","https://openalex.org/W2041357015","https://openalex.org/W2043294591","https://openalex.org/W2047582595","https://openalex.org/W2056897300","https://openalex.org/W2115614135","https://openalex.org/W2143132439","https://openalex.org/W2165303371","https://openalex.org/W2169245181","https://openalex.org/W2172161464"],"related_works":["https://openalex.org/W2098419840","https://openalex.org/W1966764473","https://openalex.org/W2789349722","https://openalex.org/W1985308002","https://openalex.org/W2056896932","https://openalex.org/W2614722573","https://openalex.org/W2121963733","https://openalex.org/W1977171228","https://openalex.org/W2059422871","https://openalex.org/W2041787842"],"abstract_inverted_index":{"Ternary":[0],"logic":[1],"is":[2,12,42,54,115],"a":[3,29,55,103],"promising":[4],"alternative":[5],"to":[6,14,21,99,105,111],"conventional":[7],"binary":[8],"logic,":[9],"since":[10],"it":[11],"possible":[13],"achieve":[15],"simplicity":[16],"and":[17,68,73,80,92],"energy":[18],"efficiency":[19],"due":[20],"the":[22,47,84,107],"reduced":[23],"circuit":[24],"overhead.":[25],"In":[26],"this":[27],"paper,":[28],"ternary":[30,51],"magnitude":[31],"comparator":[32,87,109,113],"design":[33,45,110,114],"based":[34],"on":[35,78],"Carbon":[36],"Nanotube":[37],"Field":[38],"Effect":[39],"Transistors":[40],"(CNFETs)":[41],"presented.":[43,117],"This":[44],"eliminates":[46],"usage":[48],"of":[49,57,61,66,71,96],"complex":[50],"decoder":[52,62],"which":[53],"part":[56],"existing":[58,74,100],"designs.":[59],"Elimination":[60],"results":[63,81],"in":[64],"reduction":[65],"delay":[67,94],"power.":[69],"Simulations":[70],"proposed":[72,85],"designs":[75],"are":[76],"done":[77],"HSPICE":[79],"proves":[82],"that":[83],"1-bit":[86,108],"consumes":[88],"81%":[89],"less":[90],"power":[91],"shows":[93],"advantage":[95],"41.6%":[97],"compared":[98],"design.":[101],"Further":[102],"methodology":[104],"extend":[106],"n-bit":[112],"also":[116]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}