{"id":"https://openalex.org/W7165172819","doi":"https://doi.org/10.1109/iscas66217.2026.11562741","title":"An Area-latency-balanced Hardware Design for the Reference Pixel Management of VVC Intra Coding","display_name":"An Area-latency-balanced Hardware Design for the Reference Pixel Management of VVC Intra Coding","publication_year":2026,"publication_date":"2026-05-24","ids":{"openalex":"https://openalex.org/W7165172819","doi":"https://doi.org/10.1109/iscas66217.2026.11562741"},"language":null,"primary_location":{"id":"doi:10.1109/iscas66217.2026.11562741","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas66217.2026.11562741","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5138841941","display_name":"Chengkang Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chengkang Huang","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips and Systems,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips and Systems,China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5138897451","display_name":"Leilei Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I66867065","display_name":"East China Normal University","ror":"https://ror.org/02n96ep67","country_code":"CN","type":"education","lineage":["https://openalex.org/I66867065"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Leilei Huang","raw_affiliation_strings":["East China Normal University,Institute of Microelectronic Circuits and Systems,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"East China Normal University,Institute of Microelectronic Circuits and Systems,China","institution_ids":["https://openalex.org/I66867065"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010887094","display_name":"Taoyu Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Taoyu Zhang","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips and Systems,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips and Systems,China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5124125775","display_name":"Shuocheng Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuocheng Wang","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips and Systems,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips and Systems,China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5126117886","display_name":"Yibo Fan","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yibo Fan","raw_affiliation_strings":["Fudan University,State Key Laboratory of Integrated Chips and Systems,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of Integrated Chips and Systems,China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.89636594,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"3216","last_page":"3220"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.15760000050067902,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.15760000050067902,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.15449999272823334,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.14339999854564667,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/coding","display_name":"Coding (social sciences)","score":0.516700029373169},{"id":"https://openalex.org/keywords/pixel","display_name":"Pixel","score":0.5120999813079834},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.26969999074935913},{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.2513999938964844}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6739000082015991},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.527400016784668},{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.516700029373169},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.5120999813079834},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.39419999718666077},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.357699990272522},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2973000109195709},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.26969999074935913},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.2513999938964844},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.241799995303154}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas66217.2026.11562741","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas66217.2026.11562741","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W2146395539","https://openalex.org/W2478836177","https://openalex.org/W2898690798","https://openalex.org/W2946731637","https://openalex.org/W2978800380","https://openalex.org/W2981764336","https://openalex.org/W3159928514","https://openalex.org/W3202918664","https://openalex.org/W4312566692","https://openalex.org/W4367663007","https://openalex.org/W4399880814","https://openalex.org/W4406895182","https://openalex.org/W4407937122","https://openalex.org/W4409660575","https://openalex.org/W4414197142","https://openalex.org/W4415482455"],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-19T15:51:49.773706","created_date":"2026-06-19T00:00:00"}
