{"id":"https://openalex.org/W7165155646","doi":"https://doi.org/10.1109/iscas66217.2026.11562476","title":"A 64GS/s 8b 64\u00d7 Time-Interleaved SAR ADC Achieving 33.8dB SNDR at 26GHz in 28nm CMOS","display_name":"A 64GS/s 8b 64\u00d7 Time-Interleaved SAR ADC Achieving 33.8dB SNDR at 26GHz in 28nm CMOS","publication_year":2026,"publication_date":"2026-05-24","ids":{"openalex":"https://openalex.org/W7165155646","doi":"https://doi.org/10.1109/iscas66217.2026.11562476"},"language":null,"primary_location":{"id":"doi:10.1109/iscas66217.2026.11562476","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas66217.2026.11562476","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044532709","display_name":"Yixiao Luo","orcid":"https://orcid.org/0000-0002-7319-5035"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yixiao Luo","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108047889","display_name":"Yi-Xiang Wang","orcid":"https://orcid.org/0000-0001-5697-0717"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiacheng Wang","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064273153","display_name":"Jun Chang","orcid":"https://orcid.org/0000-0002-8423-5987"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jun Chang","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077372163","display_name":"Hongzhi Liang","orcid":"https://orcid.org/0000-0001-6609-9486"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hongzhi Liang","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5138931449","display_name":"Li Dang","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li Dang","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5138866872","display_name":"Ruixue Ding","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ruixue Ding","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5138942510","display_name":"Shubin Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shubin Liu","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5138917620","display_name":"Zhangming Zhu","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhangming Zhu","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education) School of Integrated Circuits,Xi’an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I149594827"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.82143834,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1972","last_page":"1976"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9190999865531921,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9190999865531921,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.051600001752376556,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.012500000186264515,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5324000120162964},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.4311999976634979},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3231000006198883},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.3059000074863434},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.26750001311302185}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5324000120162964},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5198000073432922},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49810001254081726},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.4311999976634979},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37059998512268066},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.32850000262260437},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3231000006198883},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.321399986743927},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.3059000074863434},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.26750001311302185},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.26739999651908875},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.2556000053882599},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.25380000472068787}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas66217.2026.11562476","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas66217.2026.11562476","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8119512796401978,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W2016167819","https://openalex.org/W2166417864","https://openalex.org/W2594509431","https://openalex.org/W2768008485","https://openalex.org/W2789418862","https://openalex.org/W2906404755","https://openalex.org/W3000059814","https://openalex.org/W3209681843","https://openalex.org/W3214185915","https://openalex.org/W4392739457","https://openalex.org/W4392746509","https://openalex.org/W4403510635","https://openalex.org/W4408183574","https://openalex.org/W4410492835"],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2026-06-19T00:00:00"}