{"id":"https://openalex.org/W7165198296","doi":"https://doi.org/10.1109/iscas66217.2026.11562017","title":"A 0.07-mm <sup>2</sup> 32.7-kHz Frequency Reference with Aging Calibration Embedded 1-second Timer Scoring 22% Residual Error After 500-Hour Aging at 150\u00b0C in 28-nm CMOS","display_name":"A 0.07-mm <sup>2</sup> 32.7-kHz Frequency Reference with Aging Calibration Embedded 1-second Timer Scoring 22% Residual Error After 500-Hour Aging at 150\u00b0C in 28-nm CMOS","publication_year":2026,"publication_date":"2026-05-24","ids":{"openalex":"https://openalex.org/W7165198296","doi":"https://doi.org/10.1109/iscas66217.2026.11562017"},"language":null,"primary_location":{"id":"doi:10.1109/iscas66217.2026.11562017","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas66217.2026.11562017","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004631913","display_name":"Zhicheng Dong","orcid":"https://orcid.org/0009-0005-3584-1453"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhicheng Dong","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5138939541","display_name":"Huajin Sun","orcid":null},"institutions":[{"id":"https://openalex.org/I4210153682","display_name":"Intelligent Health (United Kingdom)","ror":"https://ror.org/0576zak10","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210153682"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Huajin Sun","raw_affiliation_strings":["Jinan Maiwei Intelligent Technology Co., Ltd"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Jinan Maiwei Intelligent Technology Co., Ltd","institution_ids":["https://openalex.org/I4210153682"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003457423","display_name":"Xiaoteng Zhao","orcid":"https://orcid.org/0000-0002-9447-8763"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoteng Zhao","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5129659762","display_name":"Yuxing Qi","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuxing Qi","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5136135509","display_name":"Zekai Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zekai Yang","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101827861","display_name":"Xianting Su","orcid":"https://orcid.org/0009-0009-1403-7094"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xianting Su","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066405059","display_name":"Rong Zhou","orcid":"https://orcid.org/0000-0002-8527-0020"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Rong Zhou","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5138879985","display_name":"Bowen Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Bowen Wang","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5138866872","display_name":"Ruixue Ding","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ruixue Ding","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5138942510","display_name":"Shubin Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shubin Liu","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5138917620","display_name":"Zhangming Zhu","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhangming Zhu","raw_affiliation_strings":["Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,Key Laboratory of Analog Integrated Circuits and Systems, Ministry of Education, School of Integrated Circuits,Xi&#x2019;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.7824671,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1042","last_page":"1046"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.2939000129699707,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.2939000129699707,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.26739999651908875,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.08399999886751175,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.680899977684021},{"id":"https://openalex.org/keywords/residual","display_name":"Residual","score":0.44359999895095825},{"id":"https://openalex.org/keywords/timer","display_name":"Timer","score":0.4284999966621399},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.351500004529953},{"id":"https://openalex.org/keywords/accelerated-aging","display_name":"Accelerated aging","score":0.29600000381469727},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.28459998965263367}],"concepts":[{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.680899977684021},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.47609999775886536},{"id":"https://openalex.org/C155512373","wikidata":"https://www.wikidata.org/wiki/Q287450","display_name":"Residual","level":2,"score":0.44359999895095825},{"id":"https://openalex.org/C2776633867","wikidata":"https://www.wikidata.org/wiki/Q186612","display_name":"Timer","level":3,"score":0.4284999966621399},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41690000891685486},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.351500004529953},{"id":"https://openalex.org/C118820876","wikidata":"https://www.wikidata.org/wiki/Q4672283","display_name":"Accelerated aging","level":2,"score":0.29600000381469727},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.28459998965263367},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.27559998631477356},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.2660999894142151},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2623000144958496},{"id":"https://openalex.org/C19619285","wikidata":"https://www.wikidata.org/wiki/Q196372","display_name":"Observational error","level":2,"score":0.26080000400543213},{"id":"https://openalex.org/C3018824978","wikidata":"https://www.wikidata.org/wiki/Q2894891","display_name":"Error analysis","level":2,"score":0.25279998779296875}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas66217.2026.11562017","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas66217.2026.11562017","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W2592665580","https://openalex.org/W2800122869","https://openalex.org/W2806039600","https://openalex.org/W2903201626","https://openalex.org/W2966791771","https://openalex.org/W4221073597","https://openalex.org/W4360605486","https://openalex.org/W4377079720","https://openalex.org/W4385216602","https://openalex.org/W4387546424","https://openalex.org/W4392746217","https://openalex.org/W4395680531","https://openalex.org/W4401879855","https://openalex.org/W4410540915"],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2026-06-19T00:00:00"}