{"id":"https://openalex.org/W4400234670","doi":"https://doi.org/10.1109/iscas58744.2024.10558544","title":"Curriculum Development for Tapeout-Ready Mixed-Signal System-on-Chip Design and Assembly","display_name":"Curriculum Development for Tapeout-Ready Mixed-Signal System-on-Chip Design and Assembly","publication_year":2024,"publication_date":"2024-05-19","ids":{"openalex":"https://openalex.org/W4400234670","doi":"https://doi.org/10.1109/iscas58744.2024.10558544"},"language":"en","primary_location":{"id":"doi:10.1109/iscas58744.2024.10558544","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas58744.2024.10558544","pdf_url":null,"source":null,"license":"public-domain","license_id":"https://openalex.org/licenses/public-domain","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084282009","display_name":"Samuel J. Murray","orcid":"https://orcid.org/0000-0002-3357-900X"},"institutions":[{"id":"https://openalex.org/I114395901","display_name":"University of Nebraska\u2013Lincoln","ror":"https://ror.org/043mer456","country_code":"US","type":"education","lineage":["https://openalex.org/I114395901"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Samuel J. Murray","raw_affiliation_strings":["University of Nebraska&#x2013;Lincoln,Department of Electrical and Computer Engineering,Lincoln,NE,USA,68588"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Nebraska&#x2013;Lincoln,Department of Electrical and Computer Engineering,Lincoln,NE,USA,68588","institution_ids":["https://openalex.org/I114395901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087343907","display_name":"Joseph A. Schmitz","orcid":"https://orcid.org/0000-0002-6191-5314"},"institutions":[{"id":"https://openalex.org/I114395901","display_name":"University of Nebraska\u2013Lincoln","ror":"https://ror.org/043mer456","country_code":"US","type":"education","lineage":["https://openalex.org/I114395901"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Joseph A. Schmitz","raw_affiliation_strings":["University of Nebraska&#x2013;Lincoln,Department of Electrical and Computer Engineering,Lincoln,NE,USA,68588"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Nebraska&#x2013;Lincoln,Department of Electrical and Computer Engineering,Lincoln,NE,USA,68588","institution_ids":["https://openalex.org/I114395901"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051590590","display_name":"Sina Balk\u0131r","orcid":null},"institutions":[{"id":"https://openalex.org/I114395901","display_name":"University of Nebraska\u2013Lincoln","ror":"https://ror.org/043mer456","country_code":"US","type":"education","lineage":["https://openalex.org/I114395901"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sina Balk\u0131r","raw_affiliation_strings":["University of Nebraska&#x2013;Lincoln,Department of Electrical and Computer Engineering,Lincoln,NE,USA,68588"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Nebraska&#x2013;Lincoln,Department of Electrical and Computer Engineering,Lincoln,NE,USA,68588","institution_ids":["https://openalex.org/I114395901"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109380502","display_name":"Michael W. Hoffman","orcid":null},"institutions":[{"id":"https://openalex.org/I114395901","display_name":"University of Nebraska\u2013Lincoln","ror":"https://ror.org/043mer456","country_code":"US","type":"education","lineage":["https://openalex.org/I114395901"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael W. Hoffman","raw_affiliation_strings":["University of Nebraska&#x2013;Lincoln,Department of Electrical and Computer Engineering,Lincoln,NE,USA,68588"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Nebraska&#x2013;Lincoln,Department of Electrical and Computer Engineering,Lincoln,NE,USA,68588","institution_ids":["https://openalex.org/I114395901"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I114395901"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9466999769210815,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9466999769210815,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.6155749559402466},{"id":"https://openalex.org/keywords/curriculum","display_name":"Curriculum","score":0.5546275973320007},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5101704597473145},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5093856453895569},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.5008487701416016},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.45674365758895874},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4370044767856598},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43128499388694763},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.42070114612579346},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.39995330572128296},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.35114526748657227},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.185969740152359},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.1489141285419464},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14403346180915833},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08340761065483093},{"id":"https://openalex.org/keywords/psychology","display_name":"Psychology","score":0.07243150472640991}],"concepts":[{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.6155749559402466},{"id":"https://openalex.org/C47177190","wikidata":"https://www.wikidata.org/wiki/Q207137","display_name":"Curriculum","level":2,"score":0.5546275973320007},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5101704597473145},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5093856453895569},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.5008487701416016},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.45674365758895874},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4370044767856598},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43128499388694763},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.42070114612579346},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39995330572128296},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.35114526748657227},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.185969740152359},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.1489141285419464},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14403346180915833},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08340761065483093},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.07243150472640991},{"id":"https://openalex.org/C19417346","wikidata":"https://www.wikidata.org/wiki/Q7922","display_name":"Pedagogy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas58744.2024.10558544","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas58744.2024.10558544","pdf_url":null,"source":null,"license":"public-domain","license_id":"https://openalex.org/licenses/public-domain","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2137840927","https://openalex.org/W2138436924","https://openalex.org/W2945116256","https://openalex.org/W2991189030","https://openalex.org/W4243403952","https://openalex.org/W4319994089","https://openalex.org/W4382657710"],"related_works":["https://openalex.org/W4242383160","https://openalex.org/W2154989823","https://openalex.org/W2065289416","https://openalex.org/W2502691491","https://openalex.org/W1607309093","https://openalex.org/W2017236304","https://openalex.org/W3142211975","https://openalex.org/W1879443270","https://openalex.org/W2018912978","https://openalex.org/W2125423773"],"abstract_inverted_index":{"This":[0,117],"paper":[1],"proposes":[2],"a":[3,17,62,79,105,124],"new":[4],"curriculum":[5],"for":[6,15,132],"under-graduate":[7],"students":[8,41,73,97],"that":[9,22],"teaches":[10],"chip-level":[11,53],"design":[12,102],"and":[13,29,34,59,82,90,103,135],"assembly":[14],"developing":[16],"complete,":[18,80],"tapeout-ready":[19,83],"System-on-Chip":[20],"(SoC)":[21],"includes":[23],"synthesized":[24],"digital":[25,87],"components,":[26,56],"analog/mixed-signal":[27,91],"blocks,":[28,50],"IP":[30],"such":[31],"as":[32],"memories":[33],"I/O":[35],"drivers.":[36],"The":[37,93],"course":[38,94],"will":[39,74,95,118],"guide":[40],"through":[42,98],"the":[43,68,71,99,114,121],"process":[44],"of":[45,55,70,77,123,127],"synthesizing":[46],"RTL":[47],"into":[48],"layout":[49],"floor":[51],"planning,":[52],"routing":[54],"simulation,":[57],"verification,":[58],"tapeout":[60],"using":[61],"45":[63],"nm":[64],"public-domain":[65],"PDK.":[66],"By":[67],"end":[69],"class,":[72],"be":[75],"capable":[76,126],"designing":[78,128],"verified,":[81],"SoC":[84,111,130],"containing":[85],"complex":[86],"microcontroller":[88],"circuitry":[89],"front-ends.":[92],"take":[96],"steps":[100],"to":[101,120],"assemble":[104],"chip":[106],"based":[107],"on":[108],"an":[109],"existing":[110],"designed":[112],"at":[113],"authors\u2019":[115],"university.":[116],"lead":[119],"development":[122],"workforce":[125],"mixed-signal":[129],"solutions":[131],"broader":[133],"industrial":[134],"academic":[136],"needs.":[137]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
