{"id":"https://openalex.org/W4400235499","doi":"https://doi.org/10.1109/iscas58744.2024.10558451","title":"Design of CNFET-based Ternary Conditional Sum Adders using Binary Carry Propagation","display_name":"Design of CNFET-based Ternary Conditional Sum Adders using Binary Carry Propagation","publication_year":2024,"publication_date":"2024-05-19","ids":{"openalex":"https://openalex.org/W4400235499","doi":"https://doi.org/10.1109/iscas58744.2024.10558451"},"language":"en","primary_location":{"id":"doi:10.1109/iscas58744.2024.10558451","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas58744.2024.10558451","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014347182","display_name":"Chetan Vudadha","orcid":"https://orcid.org/0000-0002-0277-2931"},"institutions":[{"id":"https://openalex.org/I74796645","display_name":"Birla Institute of Technology and Science, Pilani","ror":"https://ror.org/001p3jz28","country_code":"IN","type":"education","lineage":["https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Chetan Vudadha","raw_affiliation_strings":["BITS-Pilani,Department of Electrical and Electronics Engineering,India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"BITS-Pilani,Department of Electrical and Electronics Engineering,India","institution_ids":["https://openalex.org/I74796645"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5014347182"],"corresponding_institution_ids":["https://openalex.org/I74796645"],"apc_list":null,"apc_paid":null,"fwci":3.7084,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.9337169,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.991599977016449,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9871000051498413,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9659000039100647,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/ternary-operation","display_name":"Ternary operation","score":0.7983307838439941},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.772041916847229},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.7024333477020264},{"id":"https://openalex.org/keywords/carry","display_name":"Carry (investment)","score":0.6804882884025574},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6583805680274963},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.46629709005355835},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.41013920307159424},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.37856096029281616},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3747998774051666},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.20453238487243652},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08788305521011353},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08442127704620361},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.07598823308944702}],"concepts":[{"id":"https://openalex.org/C64452783","wikidata":"https://www.wikidata.org/wiki/Q1524945","display_name":"Ternary operation","level":2,"score":0.7983307838439941},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.772041916847229},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.7024333477020264},{"id":"https://openalex.org/C2776299755","wikidata":"https://www.wikidata.org/wiki/Q432449","display_name":"Carry (investment)","level":2,"score":0.6804882884025574},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6583805680274963},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.46629709005355835},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.41013920307159424},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.37856096029281616},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3747998774051666},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.20453238487243652},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08788305521011353},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08442127704620361},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.07598823308944702},{"id":"https://openalex.org/C10138342","wikidata":"https://www.wikidata.org/wiki/Q43015","display_name":"Finance","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas58744.2024.10558451","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas58744.2024.10558451","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1518236483","https://openalex.org/W2035545464","https://openalex.org/W2041357015","https://openalex.org/W2056897300","https://openalex.org/W2115614135","https://openalex.org/W2131647018","https://openalex.org/W2143132439","https://openalex.org/W2165303371","https://openalex.org/W2169245181","https://openalex.org/W2172161464","https://openalex.org/W2344229673","https://openalex.org/W2552905557","https://openalex.org/W2794561087","https://openalex.org/W2800980372","https://openalex.org/W2806525215","https://openalex.org/W3081223489","https://openalex.org/W4377103692"],"related_works":["https://openalex.org/W2075110663","https://openalex.org/W1910495841","https://openalex.org/W2109236388","https://openalex.org/W2033419648","https://openalex.org/W2059369867","https://openalex.org/W2157955791","https://openalex.org/W4225135417","https://openalex.org/W2127980940","https://openalex.org/W2095962490","https://openalex.org/W2057091512"],"abstract_inverted_index":{"This":[0,45,71],"paper":[1],"presents":[2],"a":[3,49,59,77],"new":[4,60],"methodology":[5],"to":[6,27,69,95,120,140],"implement":[7],"ternary":[8,19,103,115,142],"Conditional":[9],"Sum":[10],"Adders":[11],"(CSA)":[12],"using":[13,107],"CNFETs.":[14],"The":[15,98],"existing":[16,99,144],"design":[17],"of":[18,76,83],"conditional":[20,81],"sum":[21,43,84],"adders":[22],"conditionally":[23],"compute":[24],"sums":[25],"corresponding":[26],"three":[28],"possible":[29,65,91],"carries":[30,66],"0,":[31],"1":[32],"and":[33,35,42,85,100,132],"2,":[34],"use":[36,75],"3:1":[37],"multiplexers":[38,79],"for":[39,80,88],"correct":[40],"carry":[41,51,86,92],"selection.":[44],"technique":[46],"results":[47,110,117],"in":[48,118,123,129,135,145],"complex":[50],"propagation":[52,130],"path.":[53],"In":[54],"this":[55],"work,":[56],"we":[57],"present":[58],"approach,":[61],"which":[62],"transforms":[63],"the":[64,74,113,146],"from":[67],"{0,1,2}":[68],"{0,1}.":[70],"transformation":[72],"enables":[73],"2:1":[78],"selection":[82],"signals,":[87],"only":[89],"two":[90],"values":[93],"similar":[94],"binary":[96],"CSA.":[97],"proposed":[101,114],"CNFET-based":[102,141],"CSAs":[104,143],"are":[105],"implemented":[106],"HSPICE.":[108],"Simulation":[109],"show":[111],"that":[112],"CSA":[116],"up":[119],"87%":[121],"reduction":[122,128,134],"average":[124],"power":[125],"consumption,":[126],"27%":[127],"delay,":[131],"90%":[133],"Power-Delay":[136],"Product":[137],"when":[138],"compared":[139],"literature.":[147]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}