{"id":"https://openalex.org/W4400231134","doi":"https://doi.org/10.1109/iscas58744.2024.10558345","title":"Enhancing ML model accuracy for Digital VLSI circuits using diffusion models: A study on synthetic data generation","display_name":"Enhancing ML model accuracy for Digital VLSI circuits using diffusion models: A study on synthetic data generation","publication_year":2024,"publication_date":"2024-05-19","ids":{"openalex":"https://openalex.org/W4400231134","doi":"https://doi.org/10.1109/iscas58744.2024.10558345"},"language":"en","primary_location":{"id":"doi:10.1109/iscas58744.2024.10558345","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/iscas58744.2024.10558345","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002817683","display_name":"Prasha Srivastava","orcid":null},"institutions":[{"id":"https://openalex.org/I64189192","display_name":"International Institute of Information Technology, Hyderabad","ror":"https://ror.org/05f11g639","country_code":"IN","type":"education","lineage":["https://openalex.org/I64189192"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Prasha Srivastava","raw_affiliation_strings":["International Institute of Information Technology,Hyderabad,India"],"affiliations":[{"raw_affiliation_string":"International Institute of Information Technology,Hyderabad,India","institution_ids":["https://openalex.org/I64189192"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103937772","display_name":"Pawan Kumar","orcid":null},"institutions":[{"id":"https://openalex.org/I64189192","display_name":"International Institute of Information Technology, Hyderabad","ror":"https://ror.org/05f11g639","country_code":"IN","type":"education","lineage":["https://openalex.org/I64189192"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pawan Kumar","raw_affiliation_strings":["International Institute of Information Technology,Hyderabad,India"],"affiliations":[{"raw_affiliation_string":"International Institute of Information Technology,Hyderabad,India","institution_ids":["https://openalex.org/I64189192"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060396811","display_name":"Zia Abbas","orcid":"https://orcid.org/0000-0002-3747-3640"},"institutions":[{"id":"https://openalex.org/I64189192","display_name":"International Institute of Information Technology, Hyderabad","ror":"https://ror.org/05f11g639","country_code":"IN","type":"education","lineage":["https://openalex.org/I64189192"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Zia Abbas","raw_affiliation_strings":["International Institute of Information Technology,Hyderabad,India"],"affiliations":[{"raw_affiliation_string":"International Institute of Information Technology,Hyderabad,India","institution_ids":["https://openalex.org/I64189192"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5002817683"],"corresponding_institution_ids":["https://openalex.org/I64189192"],"apc_list":null,"apc_paid":null,"fwci":0.2824,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.52330547,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11206","display_name":"Model Reduction and Neural Networks","score":0.9922000169754028,"subfield":{"id":"https://openalex.org/subfields/3109","display_name":"Statistical and Nonlinear Physics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11206","display_name":"Model Reduction and Neural Networks","score":0.9922000169754028,"subfield":{"id":"https://openalex.org/subfields/3109","display_name":"Statistical and Nonlinear Physics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.970300018787384,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12100","display_name":"Advanced Mathematical Modeling in Engineering","score":0.9557999968528748,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8124989867210388},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6728021502494812},{"id":"https://openalex.org/keywords/data-modeling","display_name":"Data modeling","score":0.5051971077919006},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4739808142185211},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3778415024280548},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.15619611740112305},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.12767916917800903},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10556882619857788},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.08617919683456421}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8124989867210388},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6728021502494812},{"id":"https://openalex.org/C67186912","wikidata":"https://www.wikidata.org/wiki/Q367664","display_name":"Data modeling","level":2,"score":0.5051971077919006},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4739808142185211},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3778415024280548},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.15619611740112305},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.12767916917800903},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10556882619857788},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.08617919683456421}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas58744.2024.10558345","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/iscas58744.2024.10558345","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W2093276802","https://openalex.org/W2159300347","https://openalex.org/W2559655401","https://openalex.org/W2768242826","https://openalex.org/W2788329577","https://openalex.org/W2809598685","https://openalex.org/W2948978827","https://openalex.org/W2954996726","https://openalex.org/W2963108767","https://openalex.org/W2968290676","https://openalex.org/W2990954032","https://openalex.org/W2998324702","https://openalex.org/W3091131165","https://openalex.org/W3107965887","https://openalex.org/W3162926177","https://openalex.org/W3176739519","https://openalex.org/W3193647855","https://openalex.org/W3213966144","https://openalex.org/W3216426785","https://openalex.org/W4207005592","https://openalex.org/W4210827692","https://openalex.org/W4229455242","https://openalex.org/W4380894245","https://openalex.org/W4385488679","https://openalex.org/W4387195417","https://openalex.org/W6674887261","https://openalex.org/W6748667437","https://openalex.org/W6779823529","https://openalex.org/W6795288823"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W4283025278","https://openalex.org/W2390279801","https://openalex.org/W61292821","https://openalex.org/W2358668433","https://openalex.org/W2082432309","https://openalex.org/W817174743","https://openalex.org/W4396701345","https://openalex.org/W4241196849"],"abstract_inverted_index":{"<sup":[0],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[1],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">1</sup>Generative":[2],"AI":[3],"has":[4],"seen":[5],"remarkable":[6],"growth":[7],"over":[8],"the":[9,24,38,68,91,105,119],"past":[10],"few":[11],"years,":[12],"with":[13,72],"diffusion":[14,27,86,98],"models":[15,28,44,99],"being":[16],"state-of-the-art":[17],"for":[18,33,83,125],"image":[19],"generation.":[20],"This":[21],"study":[22],"investigates":[23],"use":[25],"of":[26,40,94,107,122],"in":[29,45,67,118],"artificial":[30],"data":[31,56,82,96,109,113],"generation":[32],"electronic":[34],"circuits":[35],"to":[36,60,77,100],"enhance":[37],"accuracy":[39],"subsequent":[41],"machine":[42],"learning":[43],"tasks":[46],"such":[47],"as":[48],"performance":[49],"assessment,":[50],"design,":[51],"and":[52,110],"testing":[53],"when":[54],"training":[55,81],"is":[57,115],"usually":[58],"known":[59],"be":[61],"very":[62],"limited.":[63],"We":[64,103],"utilize":[65],"simulations":[66],"HSPICE":[69],"design":[70,124],"environment":[71],"22nm":[73],"CMOS":[74],"technology":[75],"nodes":[76],"obtain":[78],"representative":[79],"real":[80,101],"our":[84],"proposed":[85],"model.":[87],"Our":[88],"results":[89],"demonstrate":[90,111],"close":[92],"resemblance":[93],"synthetic":[95],"using":[97],"data.":[102],"validate":[104],"quality":[106],"generated":[108],"that":[112],"augmentation":[114],"certainly":[116],"effective":[117],"predictive":[120],"analysis":[121],"VLSI":[123],"digital":[126],"circuits.":[127]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-03-25T13:04:00.132906","created_date":"2025-10-10T00:00:00"}