{"id":"https://openalex.org/W4400233374","doi":"https://doi.org/10.1109/iscas58744.2024.10557882","title":"A Flexible FPGA-Based Accelerator for Efficient Inference of Multi-Precision CNNs","display_name":"A Flexible FPGA-Based Accelerator for Efficient Inference of Multi-Precision CNNs","publication_year":2024,"publication_date":"2024-05-19","ids":{"openalex":"https://openalex.org/W4400233374","doi":"https://doi.org/10.1109/iscas58744.2024.10557882"},"language":"en","primary_location":{"id":"doi:10.1109/iscas58744.2024.10557882","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas58744.2024.10557882","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100439388","display_name":"Xinyan Liu","orcid":"https://orcid.org/0000-0002-0901-5108"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xinyan Liu","raw_affiliation_strings":["Nanjing University,School of Electronic Science and Engineering,Nanjing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanjing University,School of Electronic Science and Engineering,Nanjing,China","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091293910","display_name":"Xiao Wu","orcid":"https://orcid.org/0000-0001-8306-6889"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiao Wu","raw_affiliation_strings":["Nanjing University,School of Electronic Science and Engineering,Nanjing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanjing University,School of Electronic Science and Engineering,Nanjing,China","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090170161","display_name":"Haikuo Shao","orcid":"https://orcid.org/0009-0008-6965-3436"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Haikuo Shao","raw_affiliation_strings":["Nanjing University,School of Electronic Science and Engineering,Nanjing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanjing University,School of Electronic Science and Engineering,Nanjing,China","institution_ids":["https://openalex.org/I881766915"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100696999","display_name":"Zhongfeng Wang","orcid":"https://orcid.org/0000-0002-7227-4786"},"institutions":[{"id":"https://openalex.org/I881766915","display_name":"Nanjing University","ror":"https://ror.org/01rxvg760","country_code":"CN","type":"education","lineage":["https://openalex.org/I881766915"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhongfeng Wang","raw_affiliation_strings":["Nanjing University,School of Electronic Science and Engineering,Nanjing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanjing University,School of Electronic Science and Engineering,Nanjing,China","institution_ids":["https://openalex.org/I881766915"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I881766915"],"apc_list":null,"apc_paid":null,"fwci":3.9835,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.95191318,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13114","display_name":"Image Processing Techniques and Applications","score":0.9472000002861023,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13114","display_name":"Image Processing Techniques and Applications","score":0.9472000002861023,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11038","display_name":"Advanced SAR Imaging Techniques","score":0.916700005531311,"subfield":{"id":"https://openalex.org/subfields/2202","display_name":"Aerospace Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.855752170085907},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7495588660240173},{"id":"https://openalex.org/keywords/inference","display_name":"Inference","score":0.6933752298355103},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.44403403997421265},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4147583246231079},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34583136439323425},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3203944265842438},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.3148144781589508}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.855752170085907},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7495588660240173},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.6933752298355103},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44403403997421265},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4147583246231079},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34583136439323425},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3203944265842438},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3148144781589508}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas58744.2024.10557882","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas58744.2024.10557882","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W2593564159","https://openalex.org/W2795915628","https://openalex.org/W2894006184","https://openalex.org/W2963367920","https://openalex.org/W2987956272","https://openalex.org/W3158020960","https://openalex.org/W3197490098","https://openalex.org/W3206196385","https://openalex.org/W3206749822","https://openalex.org/W4205884968","https://openalex.org/W4285250061","https://openalex.org/W4293243600","https://openalex.org/W4299974909","https://openalex.org/W4308067465","https://openalex.org/W4310936523","https://openalex.org/W4321608057","https://openalex.org/W4321637212","https://openalex.org/W4393141038","https://openalex.org/W6848789543","https://openalex.org/W6856632803"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W4200391368","https://openalex.org/W2355315220","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W2316202402","https://openalex.org/W2373535795","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506"],"abstract_inverted_index":{"Multi-precision":[0],"(MP)":[1],"convolutional":[2],"neural":[3],"networks":[4],"(CNNs)":[5],"have":[6],"exploited":[7],"quantization":[8],"techniques":[9],"to":[10,31,81,103,119,141,156],"achieve":[11],"notable":[12],"computation":[13,83,124],"reductions":[14],"while":[15],"maintaining":[16],"accuracy.":[17],"However,":[18],"most":[19],"existing":[20],"accelerators":[21],"lack":[22],"sufficient":[23],"support":[24],"for":[25,75,129],"MP":[26,41,79,109,114],"multiplications,":[27],"hindering":[28],"their":[29],"ability":[30],"satisfy":[32],"the":[33,106,121,162],"diverse":[34],"precision":[35],"requirements":[36],"of":[37,78,108,139],"different":[38],"layers":[39],"in":[40],"CNNs.":[42],"To":[43],"address":[44],"this":[45],"issue,":[46],"we":[47],"propose":[48],"a":[49,66,86,137],"flexible":[50,98],"FPGA-based":[51],"accelerator":[52,135],"that":[53],"efficiently":[54],"processes":[55],"CNN":[56,110],"inference,":[57],"supporting":[58],"both":[59],"symmetric":[60],"and":[61,123],"asymmetric":[62],"bit-width":[63],"computation.":[64],"Specifically,":[65],"reconfigurable":[67],"computing":[68,92],"unit":[69],"called":[70],"MP-MAC":[71],"is":[72,101,117],"specially":[73],"designed":[74],"efficient":[76,130],"execution":[77],"computations":[80],"maximize":[82],"utilization":[84],"within":[85],"single":[87],"DSP.":[88],"Additionally,":[89],"an":[90,113],"optimized":[91],"data":[93],"arrangement,":[94],"based":[95],"on":[96,144,161],"our":[97],"parallelism":[99],"scheme,":[100],"presented":[102],"further":[104],"enhance":[105],"performance":[107,115],"deployment.":[111],"Moreover,":[112],"model":[116],"introduced":[118],"estimate":[120],"transmission":[122],"latency,":[125],"providing":[126],"valuable":[127],"guidance":[128],"hardware":[131],"design.":[132],"The":[133],"proposed":[134],"achieves":[136],"throughput":[138],"up":[140],"660.60":[142],"GOPS":[143],"Intel":[145],"Arria":[146],"10":[147],"SoC":[148],"FPGA,":[149],"with":[150],"3.77\u00d7":[151],"better":[152],"DSP":[153],"efficiency":[154],"compared":[155],"prior":[157],"work":[158],"when":[159],"evaluated":[160],"same":[163],"network.":[164]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":4}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
