{"id":"https://openalex.org/W4411726042","doi":"https://doi.org/10.1109/iscas56072.2025.11044267","title":"A FPGA-based FSE Accelerator with Dynamic Table for ZSTD compression","display_name":"A FPGA-based FSE Accelerator with Dynamic Table for ZSTD compression","publication_year":2025,"publication_date":"2025-05-25","ids":{"openalex":"https://openalex.org/W4411726042","doi":"https://doi.org/10.1109/iscas56072.2025.11044267"},"language":"en","primary_location":{"id":"doi:10.1109/iscas56072.2025.11044267","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11044267","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Yuna Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuna Lin","raw_affiliation_strings":["Xidian University,School of Computer Science and Technology,Xi&#x2019;an,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,School of Computer Science and Technology,Xi&#x2019;an,China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100399853","display_name":"Kai Liu","orcid":"https://orcid.org/0000-0002-0988-6173"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kai Liu","raw_affiliation_strings":["Xidian University,School of Computer Science and Technology,Xi&#x2019;an,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,School of Computer Science and Technology,Xi&#x2019;an,China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5037402057","display_name":"Zibo Guo","orcid":"https://orcid.org/0009-0002-3104-0737"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zibo Guo","raw_affiliation_strings":["Xidian University,School of Computer Science and Technology,Xi&#x2019;an,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Xidian University,School of Computer Science and Technology,Xi&#x2019;an,China","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I149594827"],"apc_list":null,"apc_paid":null,"fwci":2.8273,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.90637635,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.942300021648407,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.942300021648407,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7508255243301392},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6871373653411865},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.6576501131057739},{"id":"https://openalex.org/keywords/compression","display_name":"Compression (physics)","score":0.4878709316253662},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.48239123821258545},{"id":"https://openalex.org/keywords/dynamic-range-compression","display_name":"Dynamic range compression","score":0.45118552446365356},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3860026001930237},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3370019197463989},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.1049090325832367},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08407911658287048},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.0815783143043518},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.06691554188728333}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7508255243301392},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6871373653411865},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.6576501131057739},{"id":"https://openalex.org/C180016635","wikidata":"https://www.wikidata.org/wiki/Q2712821","display_name":"Compression (physics)","level":2,"score":0.4878709316253662},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.48239123821258545},{"id":"https://openalex.org/C150178126","wikidata":"https://www.wikidata.org/wiki/Q18433212","display_name":"Dynamic range compression","level":2,"score":0.45118552446365356},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3860026001930237},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3370019197463989},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.1049090325832367},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08407911658287048},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0815783143043518},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.06691554188728333},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iscas56072.2025.11044267","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iscas56072.2025.11044267","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE International Symposium on Circuits and Systems (ISCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7799999713897705}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1847634394","https://openalex.org/W2001055007","https://openalex.org/W2060108852","https://openalex.org/W2107745473","https://openalex.org/W3012143782","https://openalex.org/W3175067038","https://openalex.org/W4380881085","https://openalex.org/W4395073467","https://openalex.org/W6633884508"],"related_works":["https://openalex.org/W1972233422","https://openalex.org/W4385486824","https://openalex.org/W4297695714","https://openalex.org/W2611316230","https://openalex.org/W1528302882","https://openalex.org/W2274026817","https://openalex.org/W2612632602","https://openalex.org/W2321805087","https://openalex.org/W2296858511","https://openalex.org/W4403467802"],"abstract_inverted_index":{"Finite":[0],"state":[1,65],"entropy":[2],"(FSE)":[3],"is":[4,118,141],"a":[5,23,39,55,90,105,124],"crucial":[6],"component":[7],"of":[8,19,123,136],"the":[9,49,64,80,85,96,119,163,176],"powerful":[10],"Zstandard":[11],"(ZSTD)":[12],"lossless":[13],"compressor.":[14],"However,":[15],"previous":[16,156],"hardware":[17,121],"implementations":[18],"FSE":[20,43],"have":[21],"used":[22],"static":[24],"table":[25,42,59,66,126],"method,":[26],"causing":[27],"major":[28],"performance":[29,51],"(compression":[30],"ratio)":[31],"losses.":[32],"Therefore,":[33],"in":[34],"this":[35,117],"paper,":[36],"we":[37,83],"propose":[38],"pipelined":[40,57,81],"dynamic":[41,58,125],"accelerator":[44,102,122,133,161],"on":[45,104],"FPGA":[46,109,158],"to":[47,79,94,138,143,155],"mitigate":[48],"compression":[50,71,164],"loss.":[52],"We":[53],"present":[54],"fully":[56],"building":[60],"design,":[61,82],"which":[62,140],"adjusts":[63],"size":[67],"by":[68,166],"setting":[69],"four":[70],"levels":[72],"through":[73],"configurable":[74],"parameters.":[75],"To":[76,114],"better":[77],"adapt":[78],"improved":[84],"normalization":[86],"algorithm":[87],"and":[88,170],"proposed":[89],"parallel":[91],"design":[92],"scheme":[93],"reduce":[95],"encoding":[97],"module\u2019s":[98],"waiting":[99],"time.":[100],"Our":[101],"implemented":[103],"Xilinx":[106],"Kintex-7":[107],"KC705":[108],"board":[110],"runs":[111],"at":[112,151,174],"180MHz.":[113],"our":[115,132,160],"knowledge,":[116],"first":[120],"FSE.":[127],"Experimental":[128],"results":[129],"show":[130],"that":[131],"achieves":[134],"throughputs":[135],"735MB/s":[137],"982MB/s,":[139],"15\u00d7":[142],"38\u00d7":[144],"faster":[145],"than":[146],"Intel(R)":[147],"Core(TM)":[148],"i7-13700K":[149],"CPU":[150],"3.40":[152],"GHz.":[153],"Compared":[154],"state-of-the-art":[157],"implementation,":[159],"improves":[162],"ratio":[165],"23.89%":[167],"(Silesia":[168],"corpus)":[169,173],"28.75%":[171],"(Canterbury":[172],"essentially":[175],"same":[177],"throughput.":[178]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
